AT32UC3C1512C Atmel Corporation, AT32UC3C1512C Datasheet - Page 237

• Manufacturer Part Number: AT32UC3C1512C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C1512C

• Flash (kbytes): 512 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 81
• Ext Interrupts: 100
• Usb Transceiver: 1
• Quadrature Decoder Channels: 2
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 7
• Twi (i2c): 3
• Uart: 5
• Can: 2
• Lin: 5
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 22
• Input Capture Channels: 12
• Pwm Channels: 19
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32000D–04/2011
MULSATHH.H – Multiply Halfwords with Saturation into Halfword
Architecture revision:
Architecture revision1 and higher.
Description
Multiplies the two halfword registers specified, shifts the results one position to the left and
stores the sign-extended high halfword of the result in the destination word-register. If the two
operands equals -1, the result is saturated to the largest positive 16-bit fractional number. The
halfword registers are selected as either the high or low part of the operand registers.
Operation:
I.
Syntax:
I.
Operands:
I.
Status Flags:
Opcode:
Example:
31
1
15
0
If (Rx-part == t) then operand1 = SE(Rx[31:16]) else operand1 = SE(Rx[15:0]);
If (Ry-part == t) then operand2 = SE(Ry[31:16]) else operand2 = SE(Ry[15:0]);
If (operand1 == operand2 == 0x8000)
else
mulsathh.h Rd, Rx:<part>, Ry:<part>
{d, x, y} ∈ {0, 1, …, 15}
part ∈ {t,b}
Q:
V:
N:
Z:
C:
mulsathh.h R10, R2:t, R3:b
will perform R10 ← SE( Sat(SE(R2[31:16]) × SE(R3[15:0]) ) >> 15 )
1
0
29
1
0
Rd ← 0x7FFF;
Rd ← SE( (operand1 × operand2) >> 15 );
Set if saturation occurred, or previously set.
Not affected.
Not affected.
Not affected.
Not affected.
28
12
0
11
1
Rx
0
25
0
8
24
0
0
7
0
1
6
0
0
5
0
X
4
20
0
Y
3
19
Ry
Rd
AVR32
0
16
237