AT32UC3C1512C Atmel Corporation, AT32UC3C1512C Datasheet - Page 264

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AT32UC3C1512C

Manufacturer Part Number
AT32UC3C1512C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT32UC3C1512C

Flash (kbytes)
512 Kbytes
Pin Count
100
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
81
Ext Interrupts
100
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
7
Twi (i2c)
3
Uart
5
Can
2
Lin
5
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
68
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
22
Input Capture Channels
12
Pwm Channels
19
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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264
AVR32
PADDSUBS.{UH/SH} – Packed Halfword Addition and Subtraction with Sat-
uration
Architecture revision:
Architecture revision1 and higher.
Description
Perform an addition and subtraction on the same halfword operands which are selected from the
source registers. The resulting halfwords are saturated to unsigned halfwords (paddsubs.uh) or
signed halfwords (paddsubs.sh) and then packed together in the destination register.
Operation:
I.
II.
Syntax:
I.
II.
Operands:
I,II.
Status Flags:
Opcode:
31
1
15
0
If (Rx-part == t) then operand1 = Rx[31:16] else operand1 = Rx[15:0];
If (Ry-part == t) then operand2 = Ry[31:16] else operand2 = Ry[15:0];
Rd[31:16] ← SATU(ZE(operand1, 17) + ZE(operand2, 17), 16);
Rd[15:0] ← SATSU(ZE(operand1, 17) - ZE(operand2, 17), 16);
If (Rx-part == t) then operand1 = Rx[31:16] else operand1 = Rx[15:0];
If (Ry-part == t) then operand2 = Ry[31:16] else operand2 = Ry[15:0];
Rd[31:16] ← SATS(SE(operand1, 17) + SE(operand2, 17), 16);
Rd[15:0] ← SATS(SE(operand1, 17) - SE(operand2, 17), 16);
paddsubs.uh
paddsubs.sh
{d, x, y} ∈ {0, 1, …, 15}
part ∈ {t,b}
Q:
V:
N:
Z:
C:
Format I:
1
0
29
1
1
Flag set if saturation occured in one or more of the partial operations.
Not affected.
Not affected.
Not affected.
Not affected.
28
0
Rd, Rx:<part>, Ry:<part>
Rd, Rx:<part>, Ry:<part>
0
Rx
0
25
1
24
0
0
0
0
6
0
0
5
0
X
4
20
0
Y
3
19
Ry
Rd
32000D–04/2011
0
16

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