AT32UC3C1512C Atmel Corporation, AT32UC3C1512C Datasheet - Page 43

• Manufacturer Part Number: AT32UC3C1512C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C1512C

• Flash (kbytes): 512 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 81
• Ext Interrupts: 100
• Usb Transceiver: 1
• Quadrature Decoder Channels: 2
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 7
• Twi (i2c): 3
• Uart: 5
• Can: 2
• Lin: 5
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 22
• Input Capture Channels: 12
• Pwm Channels: 19
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

5.2.5
32000D–04/2011
Translation process
The translation process maps addresses from the virtual address space to the physical address
space. The addresses are generated as shown in
chosen:
Table 5-5.
A data memory access can be described as shown in
Table 5-6.
Page size
1 kB
4 kB
64 kB
1 MB
If (Segmentation disabled)
else
endif;
If (! PagingEnabled)
else
if (VA in Privileged space)
endif;
if (VA in P4 space)
else if (VA in P2 space)
else if (VA in P1 space)
else
endif;
PerformAccess(cached, write-back);
PerformPagedAccess(VA);
if (InApplicationMode)
PerformAccess(non-cached);
PerformAccess(non-cached);
PerformAccess(cached, writeback);
// VA in P0, U0 or P3 space
if ( ! PagingEnabled)
else
endif;
SignalException(DTLB Protection, accesstype);
PerformAccess(cached, writeback);
PerformPagedAccess(VA);
Physical address generation
Data memory access pseudo-code example
Physical address
PFN[31:10], VA[9:0]
PFN[31:12], VA[11:0]
PFN[31:16], VA[15:0]
PFN[31:20], VA[19:0]
Table
Table
5-6.
5-5, depending on the page size
AVR32
43