AT32UC3C2128C Atmel Corporation, AT32UC3C2128C Datasheet - Page 8
AT32UC3C2128C
Manufacturer Part Number
AT32UC3C2128C
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.AT32UC3C0128C.pdf
(1313 pages)
4.AT32UC3C0128C.pdf
(108 pages)
Specifications of AT32UC3C2128C
Flash (kbytes)
128 Kbytes
Pin Count
64
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
45
Ext Interrupts
64
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
5
Twi (i2c)
2
Uart
4
Can
2
Lin
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
36
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
13
Input Capture Channels
6
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3C2128C-A2UR
Manufacturer:
ATMEL
Quantity:
1 043
Part Number:
AT32UC3C2128C-Z2UR
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
2.4
32002F–03/2010
The Status Register
Figure 2-1.
The Status Register (SR) consists of two halfwords, one upper and one lower, see
page 8
well as the L and T bits, while the upper halfword contains information about the mode and state
the processor executes in. The upper halfword can only be accessed from a privileged mode.
Figure 2-2.
A p p lic a tio n
B it 3 1
Bit 31
SS
0
S P _ A P P
IN T 0 P C
IN T 1 P C
F IN T P C
S M P C
R 1 2
R 1 1
R 1 0
P C
L R
R 9
R 8
R 7
R 6
R 5
R 4
R 3
R 2
R 1
R 0
S R
LC
1
0
B it 0
-
and
0
-
S u p e r v is o r
B it 3 1
Figure 2-3 on page
S P _ S Y S
IN T 0 P C
IN T 1 P C
F IN T P C
S M P C
Register File in AVR32A
The Status Register high halfword
R 1 2
R 1 1
R 1 0
P C
L R
R 9
R 8
R 7
R 6
R 5
R 4
R 3
R 2
R 1
R 0
S R
0
-
B it 0
DM
0
IN T 0
B it 3 1
S P _ S Y S
D
F IN T P C
0
IN T 0 P C
IN T 1 P C
S M P C
R 1 2
R 1 1
R 1 0
P C
L R
R 9
R 8
R 7
R 6
R 5
R 4
R 3
R 2
R 1
R 0
S R
B it 0
0
-
M2
9. The lower halfword contains the C, Z, N, V and Q flags, as
0
IN T 1
B it 3 1
S P _ S Y S
IN T 0 P C
IN T 1 P C
F IN T P C
S M P C
R 1 2
R 1 1
R 1 0
P C
S R
L R
R 9
R 8
R 7
R 6
R 5
R 4
R 3
R 2
R 1
R 0
M1
0
B it 0
M0
1
IN T 2
B it 3 1
EM
S P _ S Y S
F IN T P C
IN T 0 P C
IN T 1 P C
1
S M P C
R 1 2
R 1 1
R 1 0
P C
L R
R 9
R 8
R 7
R 6
R 5
R 4
R 3
R 2
R 1
R 0
S R
B it 0
S S _ S T A T U S
S S _ S P _ S Y S
S S _ S P _ A P P
I3M
S S _ A D R F
S S _ A D R R
0
S S _ A D R 0
S S _ A D R 1
S S _ R A R
S S _ R S R
I2M
FE
IN T 3
B it 3 1
0
S P _ S Y S
IN T 0 P C
IN T 1 P C
F IN T P C
S M P C
R 1 2
R 1 1
R 1 0
P C
S R
L R
R 9
R 8
R 7
R 6
R 5
R 4
R 3
R 2
R 1
R 0
I1M
0
B it 0
I0M
0
E x c e p tio n
B it 3 1
Bit 16
S P _ S Y S
F IN T P C
IN T 0 P C
IN T 1 P C
GM
S M P C
1
R 1 2
R 1 1
R 1 0
P C
L R
R 9
R 8
R 7
R 6
R 5
R 4
R 3
R 2
R 1
R 0
S R
B it 0
Bit name
Initial value
Global Interrupt Mask
Interrupt Level 0 Mask
Interrupt Level 1 Mask
Interrupt Level 2 Mask
Interrupt Level 3 Mask
Mode Bit 0
Mode Bit 1
Mode Bit 2
Reserved
Debug State
Debug State Mask
Reserved
Secure State
Exception Mask
N M I
B it 3 1
S P _ S Y S
IN T 0 P C
IN T 1 P C
F IN T P C
S M P C
R 1 2
R 1 1
R 1 0
P C
S R
L R
R 9
R 8
R 7
R 6
R 5
R 4
R 3
R 2
R 1
R 0
B it 0
Figure 2-2 on
AVR32
S e c u r e
B it 3 1
S P _ S E C
IN T 0 P C
IN T 1 P C
F IN T P C
S M P C
R 1 2
R 1 1
R 1 0
P C
L R
R 9
R 8
R 7
R 6
R 5
R 4
R 3
R 2
R 1
R 0
S R
B it 0
8