AT32UC3C2256C Atmel Corporation, AT32UC3C2256C Datasheet - Page 173

• Manufacturer Part Number: AT32UC3C2256C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C2256C

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 45
• Ext Interrupts: 64
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Can: 2
• Lin: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 13
• Input Capture Channels: 6
• Pwm Channels: 14
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32000D–04/2011
LD.D – Load Doubleword
Architecture revision:
Architecture revision1 and higher.
Description
Reads the doubleword memory location specified.
Operation:
I.
II.
III.
IV.
V.
Syntax:
I.
II.
III.
IV.
V.
Operands:
I-V.
IV.
V.
Status Flags:
Opcode:
15
1
Rd+1:Rd ← *(Rp);
Rp ← Rp + 8;
Rp ← Rp - 8;
Rd+1:Rd ← *(Rp);
Rd+1:Rd ← *(Rp);
Rd+1:Rd ← *(Rp + (SE(disp16)));
Rd+1:Rd ← *(Rb + (Ri << sa2));
ld.d
ld.d
ld.d
ld.d
ld.d
d ∈ {0, 2, 4, …, 14}
p, b, i ∈ {0, 1, …, 15}
disp ∈ {-32768, -32767, ..., 32767}
sa ∈ {0, 1, 2, 3}
Q:
V:
N:
Z:
C:
Format I:
0
13
1
Rd, Rp++
Rd, --Rp
Rd, Rp
Rd, Rp[disp]
Rd, Rb[Ri<<sa]
Not affected.
Not affected.
Not affected.
Not affected.
Not affected.
12
Rp
9
8
1
0
6
0
5
0
4
0
3
Rd
AVR32
1
0
1
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