AT32UC3C264C Atmel Corporation, AT32UC3C264C Datasheet - Page 89
AT32UC3C264C
Manufacturer Part Number
AT32UC3C264C
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.AT32UC3C0128C.pdf
(1313 pages)
4.AT32UC3C0128C.pdf
(108 pages)
Specifications of AT32UC3C264C
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
45
Ext Interrupts
64
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
5
Twi (i2c)
2
Uart
4
Can
2
Lin
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
20
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
13
Input Capture Channels
6
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3C264C-A2UR
Manufacturer:
INTERSIL
Quantity:
1 670
Part Number:
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Manufacturer:
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Quantity:
20 000
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3C0128C PDF datasheet #3
- AT32UC3C0128C PDF datasheet #4
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- Download datasheet (20Mb)
32117C–AVR-08/11
This allows the user to allocate separate handlers and priorities to the different interrupt types.
The interrupt request will be generated if the corresponding bit in the Interrupt Mask Register
(IMR) is set. Bits in IMR are set by writing a one to the corresponding bit in the Interrupt Enable
Register (IER), and cleared by writing a one to the corresponding bit in the Interrupt Disable
Register (IDR). The interrupt request remains active until the corresponding bit in the Interrupt
Status Register (ISR) is cleared by writing a one to the corresponding bit in the Interrupt Clear
Register (ICR).
• BOD50DET - 5V Brown out detection:
• BOD33DET - 3.3V Brown out detection:
• BODDET - 1.8V Brown out detection:
• PLL1LOCK - PLL1 locked:
• PLL0LOCK - PLL0 locked:
• RCOSC8MRDY - 8MHz / 1MHz RCOSC Ready:
• OSC32RDY - 32KHz Oscillator Ready:
• OSCR1DY - OSC1 Ready:
• OSCR0DY - OSC0 Ready:
– Set when a 0 to 1 transition on the PCLKSR.BOD50DET bit is detected.
– Set when a 0 to 1 transition on the PCLKSR.BOD33DET bit is detected.
– Set when a 0 to 1 transition on the PCLKSR.BODDET bit is detected.
– Set when a 0 to 1 transition on the PCLKSR.PLL1LOCK bit is detected.
– Set when an 0 to 1 transition on the PCLKSR.PLL0LOCK bit is detected.
– Set when a 0 to 1 transition on the PCLKSR.RCOSC8MRDY bit is detected.
– Set when a 0 to 1 transition on the PCLKSR.OSC32RDY bit is detected.
– Set when a 0 to 1 transition on the PCLKSR.OSC1RDY bit is detected.
– Set when a 0 to 1 transition on the PCLKSR.OSC0RDY bit is detected.
AT32UC3C
89
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