AT83C5135 Atmel Corporation, AT83C5135 Datasheet - Page 90
AT83C5135
Manufacturer Part Number
AT83C5135
Description
Manufacturer
Atmel Corporation
Datasheet
1.AT83C5134.pdf
(166 pages)
Specifications of AT83C5135
Max. Operating Frequency
32 MHz
Cpu
8051-12C
Max I/o Pins
34
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
1
Uart
1
Sram (kbytes)
1.25
Eeprom (bytes)
512
Operating Voltage (vcc)
2.7 to 3.6
Timers
4
Mask Rom (kbytes)
16
Watchdog
Yes
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Figure 20-4. Format and State in the Master Transmitter Mode
90
CR2
1
1
1
1
Successfull
transmission
to a slave
receiver
Next transfer
started with a
repeated start
condition
Not acknowledge
received after the
slave address
Not acknowledge
received after a data
byte
Arbitration lost in slave
address or data byte
Arbitration lost and
addressed as slave
AT83C5134/35/36
CR1
0
0
1
1
From master to slave
From slave to master
CR0
08h
0
1
0
1
S
SLA
F
OSCA
0.5 <. < 62.5
= 12 MHz
100
200
-
W
Bit Frequency ( kHz)
A or A
Data
MT
18h
A
A
A
20h
38h
68h
n
F
Other master
Other master
continues
78h
OSCA
continues
0.67 <. < 83
P
A
133.3
266.6
= 16 MHz
Data
-
B0h
Any number of data bytes and their associated
acknowledge bits
This number (contained in SSCS) corresponds
to a defined state of the 2-wire bus
A or A
28h
Timer 1 in mode 2 can be used as TWI baudrate
A
A
38h
30h
generator with the following formula:
To corresponding
states in slave mode
Other master
continues
96.(256-”Timer1 reload value”)
P
S
10h
P
F
OSCA
Unused
SLA
divided by
120
60
W
R
7683C–USB–11/07
MR
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