AT89C5132 Atmel Corporation, AT89C5132 Datasheet - Page 129
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AT89C5132
Manufacturer Part Number
AT89C5132
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT89C5132.pdf
(3 pages)
2.AT89C5132.pdf
(182 pages)
3.AT89C5132.pdf
(38 pages)
4.AT89C5132.pdf
(33 pages)
Specifications of AT89C5132
Flash (kbytes)
64 Kbytes
Max. Operating Frequency
20 MHz
Cpu
8051-12C
Max I/o Pins
44
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Uart
1
Adc Channels
2
Adc Resolution (bits)
10
Adc Speed (ksps)
22.7
Sram (kbytes)
2.25
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 3.6
Timers
2
Isp
UART/USB
Watchdog
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
19.4
4173E–USB–09/07
Registers
Figure 19-12. Slave SPI Interrupt Policy Flows
Table 98. SPCON Register
SPCON (S:C3h) – SPI Control Register
Bit Number
SPR2
7
7
6
5
4
3
2
Mnemonic
SSDIS
MSTR
SPEN
SPEN
CPOL
CPHA
SPR2
Bit
6
Program CPOL & CPHA
Write Data in SPDAT
SPI Initialization
Select Slave Mode
Interrupt Policy
Prepare Transfer
Enable Interrupt
Select Format
Enable SPI
MSTR = 0
SPEN = 1
Description
SPI Rate Bit 2
Refer to Table 97 for bit rate description.
SPI Enable Bit
Set to enable the SPI interface.
Clear to disable the SPI interface.
Slave Select Input Disable Bit
Set to disable SS in both master and slave modes. In slave mode this bit has no effect if
CPHA = 0.
Clear to enable SS in both master and slave modes.
Master Mode Select
Set to select the master mode.
Clear to select the slave mode.
SPI Clock Polarity Bit
Set to have the clock output set to high level in idle state.
Clear to have the clock output set to low level in idle state.
SPI Clock Phase Bit
Set to have the data sampled when the clock returns to idle state (see CPOL).
Clear to have the data sampled when the clock leaves the idle state (see CPOL).
ESPI =1
SSDIS
5
MSTR
4
(1)
CPOL
3
Prepare New Transfer
Write Data in SPDAT
Get Data Received
Service Routine
SPI Interrupt
Read SPSTA
Read SPDAT
Get Status
CPHA
2
AT89C5132
SPR1
1
SPR0
0
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