AT89C51CC02 Atmel Corporation, AT89C51CC02 Datasheet - Page 111
AT89C51CC02
Manufacturer Part Number
AT89C51CC02
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT89C51CC02.pdf
(7 pages)
2.AT89C51CC02.pdf
(159 pages)
3.AT89C51CC02.pdf
(33 pages)
4.AT89C51CC02.pdf
(29 pages)
Specifications of AT89C51CC02
Flash (kbytes)
16 Kbytes
Max. Operating Frequency
40 MHz
Cpu
8051-12C
Max I/o Pins
20
Uart
1
Can
1
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
62.5
Sram (kbytes)
0.5
Eeprom (bytes)
2048
Self Program Memory
API
Operating Voltage (vcc)
3.0 to 5.5
Timers
4
Isp
UART/CAN
Watchdog
Yes
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4126L–CAN–01/08
Table 86. CANIDM4 Register for V2.0 Part B
CANIDM4 for V2.0 Part B (S:C7h)
CAN Identifier Mask Registers 4
Note:
No default value after reset.
Table 87. CANMSG Register
CANMSG (S:A3h)
CAN Message Data Register
No default value after reset.
IDMSK 4
MSG 7
Bit Number
Bit Number
7
7
7 - 3
7 - 0
2
1
0
The ID Mask is only used for reception.
IDMSK 3
MSG 6
6
6
Bit Mnemonic
Bit Mnemonic
IDMSK4:0
RTRMSK
IDEMSK
MSG7:0
IDMSK 2
-
MSG 5
5
5
Description
IDentifier Mask Value
0 - comparison true forced.
1 - bit comparison enabled.
See Figure 43.
Remote transmission request Mask Value
0 - comparison true forced.
1 - bit comparison enabled.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
IDentifier Extension Mask Value
0 - comparison true forced.
1 - bit comparison enabled.
Description
Message Data
This register contains the mailbox data byte pointed at the page
message object register.
After writing in the page message object register, this byte is equal
to the specified message location (in the mailbox) of the pre-
defined identifier + index. If auto-incrementation is used, at the end
of the data register writing or reading cycle, the mailbox pointer is
auto-incremented. The range of the counting is 8 with no end loop
(0, 1,..., 7, 0,...)
IDMSK 1
MSG 4
4
4
IDMSK 0
MSG 3
3
3
AT/T89C51CC02
RTRMSK
MSG 2
2
2
MSG 1
1
1
-
IDEMSK
MSG 0
0
0
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