AT89LP213 Atmel Corporation, AT89LP213 Datasheet - Page 57
AT89LP213
Manufacturer Part Number
AT89LP213
Description
Manufacturer
Atmel Corporation
Datasheet
1.AT89LP213.pdf
(98 pages)
Specifications of AT89LP213
Flash (kbytes)
2 Kbytes
Max. Operating Frequency
20 MHz
Cpu
8051-1C
Max I/o Pins
14
Spi
1
Sram (kbytes)
0.125
Operating Voltage (vcc)
2.4 to 5.5
Timers
2
Isp
SPI/OCD
Watchdog
Yes
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Table 19-1.
Note:
Figure 19-1. Negative Edge with Debouncing Example
3538E–MICRO–11/10
Symbol
CIDL
CF
CEN
CM [2:0]
ACSR = 97H
Not Bit Addressable
Bit
1. Debouncing modes require the use of Timer 1 to generate the sampling delay.
Function
Comparator Idle Enable. If CIDL = 1 the comparator will continue to operate during Idle mode. If CIDL = 0 the
comparator is powered down during Idle mode. The comparator is always shut down during Power-down mode.
Comparator Interrupt Flag. Set when the comparator output meets the conditions specified by the CM [2:0] bits and CEN
is set. The flag must be cleared by software. The interrupt may be enabled/disabled by setting/clearing bit 6 of IE.
Comparator Enable. Set this bit to enable the comparator. Clearing this bit will force the comparator output low and
prevent further events from setting CF. When CEN = 1 the analog input pins, P1.0 and P1.1, have their digital inputs
disabled.
Comparator Interrupt Mode
CM2
0
0
0
0
1
1
1
1
ACSR
–
7
– Analog Comparator Control & Status Register
CM1
0
0
1
1
0
0
1
1
Timer 1 Overflow
Comparator Out
CM0
0
1
0
1
0
1
0
1
–
6
CF
Start
Interrupt Mode
Negative (Low) level
Positive edge
Toggle with debouncing
Positive edge with debouncing
Negative edge
Toggle
Negative edge with debouncing
Positive (High) level
CIDL
5
Compare
CF
4
(1)
Start
(1)
(1)
CEN
3
Compare
CM3
2
Reset Value = XXX0 0000B
AT89LP213/214
CM1
1
CM0
0
57
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