AT89LP51RC2 Atmel Corporation, AT89LP51RC2 Datasheet - Page 33
AT89LP51RC2
Manufacturer Part Number
AT89LP51RC2
Description
Manufacturer
Atmel Corporation
Specifications of AT89LP51RC2
Flash (kbytes)
32 Kbytes
Max. Operating Frequency
20 MHz
Cpu
8051-1C
Max I/o Pins
42
Spi
1
Twi (i2c)
1
Uart
1
Adc Channels
7
Adc Resolution (bits)
10
Adc Speed (ksps)
153.8
Sram (kbytes)
1.375
Self Program Memory
API
Operating Voltage (vcc)
2.4 to 5.5
Timers
4
Isp
SPI/OCD/UART
Watchdog
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- Current page: 33 of 254
- Download datasheet (8Mb)
3722A–MICRO–10/11
A block diagram of the MAC unit is shown in
vided by the register pairs (AX,ACC) and (BX,B) where AX (E1H) and BX (F7H) hold the higher
order bytes. The 16-by-16 bit multiplication is computed through partial products using the
AT89LP51RB2/RC2/IC2’s 8-bit multiplier. The 32-bit signed product is added to the 40-bit M
accumulator register. The MAC operation is summarized as follows:
All computation is done in signed two’s complement form.
Figure 5-3.
The MAC operation is performed by executing the MAC AB (A5 A4H) extended instruction. This
two-byte instruction requires nine clock cycles to complete as the multiply is done in a sequential
manner using partial products. The operand registers are not modified by the instruction and the
result is stored in the 40-bit M register. MAC AB also updates the C and OV flags in PSW. C rep-
resents the sign of the MAC result and OV is the two’s complement overflow. Note that MAC AB
will not clear OV if it was previously set to one.
Three additional extended instructions operate directly on the M register. CLR M (A5 E4H)
clears the entire 40-bit register in two clock cycles. LSL M (A5 23H) and ASR (A5 03H) shift M
one bit to the left and right respectively. Right shifts are done arithmetically, i.e. the sign is
preserved.
The 40-bit M register is accessible 16-bits at a time through a sliding window as shown in
5-4. The MRW
through the MACL and MACH addresses. For normal fixed point operations the window can be
fixed to the rank of interest. For example, multiplying two 1.15 format numbers places a 2.30 for-
mat result in the M register. If MRW is set to 10B, a 1.15 value is obtained after performing a
single LSL M.
Multiply–Accumulate Unit
1-0
bits in DSPR
SMLA
SMLB
MRW
PSW
MAC AB:
AT89LP51RB2/RC2/IC2 Preliminary
AX
(Table
M4
16 x 16-bit Signed MULT
ACC
5-1) select which 16-bit segment is currently accessible
M
M3
←
M
Figure
+
40-bit ADD
{
AX ACC
BX
M2
,
5-3. The 16-bit signed operands are pro-
}
MACH
×
B
M1
{
BX B
Shifter
, }
MACL
M0
Figure
33
Related parts for AT89LP51RC2
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
8-Bit Microcontroller with 4K Bytes Flash
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
INTERVAL AND WIPE/WASH WIPER CONTROL IC WITH DELAY
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Low-Voltage Voice-Switched IC for Hands-Free Operation
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
MONOLITHIC INTEGRATED FEATUREPHONE CIRCUIT
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
AM-FM Receiver IC U4255BM-M
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Monolithic Integrated Feature Phone Circuit
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Multistandard Video-IF and Quasi Parallel Sound Processing
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
High-performance EE PLD
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
8-bit Flash Microcontroller
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
2-Wire Serial EEPROM
Manufacturer:
ATMEL Corporation
Datasheet: