ATmega1284PR231 Atmel Corporation, ATmega1284PR231 Datasheet - Page 147

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ATmega1284PR231

Manufacturer Part Number
ATmega1284PR231
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega1284PR231

Flash (kbytes)
128 Kbytes
Max. Operating Frequency
20 MHz
Max I/o Pins
32
Spi
3
Twi (i2c)
1
Uart
2
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Crypto Engine
AES
Sram (kbytes)
16
Eeprom (bytes)
4096
Operating Voltage (vcc)
1.8 to 3.6
Timers
3
Frequency Band
2.4 GHz
Max Data Rate (mb/s)
2
Antenna Diversity
Yes
External Pa Control
Yes
Power Output (dbm)
3
Receiver Sensitivity (dbm)
-101
Receive Current Consumption (ma)
13.2
Transmit Current Consumption (ma)
14.4
Link Budget (dbm)
104
11.5
11.5.1
11.5.2
Figure 11-11. TX Power Ramping Control for RF Front-Ends
8111C–MCU Wireless–09/09
TRX_STATE
SLP_TR
PA buffer
PA
Modulation
DIG3
DIG4
RX/TX Indicator
Overview
External RF-Front End Control
PLL_ON
0
The main features are:
While IEEE 802.15.4 is a low cost, low power standard, solutions supporting higher transmit out-
put power are occasionally desirable. To simplify the control of an optional external RF front-
end, a differential control pin pair can indicate that the AT86RF231 is currently in transmit mode.
The control of an external RF front-end is done via digital control pins DIG3/DIG4. The function
of this pin pair is enabled with register bit PA_EXT_EN (register 0x04, TRX_CTRL_1). While the
transmitter is turned off pin 1 (DIG3) is set to low level and pin 2 (DIG4) to high level. If the radio
transceiver starts to transmit, the two pins change the polarity. This differential pin pair can be
used to control PA, LNA, and RF switches.
If the AT86RF231 is not in a receive or transmit state, it is recommended to disable register bit
PA_EXT_EN (register 0x04, TRX_CTRL_1) to reduce the power consumption or avoid leakage
current of external RF switches and other building blocks, especially during SLEEP state. If reg-
ister bits PA_EXT_EN = 0, output pins DIG3/DIG4 are pulled-down to analog ground.
Using an external RF front-end including a power amplifier (PA) it may be required to adjust the
setup time of the external PA relative to the internal building blocks to optimize the overall power
spectral density (PSD) mask.
The start-up sequence of the individual building blocks of the internal transmitter is shown in
ure 11-11 on page
(SLP_TR). The radio transceiver state changes from PLL_ON to BUSY_TX and the PLL settles
• RX/TX Indicator to control an external RF Front-End
• Microcontroller independent RF Front-End Control
• Provide TX Timing Information
2
4
147, where transmission is actually initiated by the rising edge of pin 11
6
8
BUSY_TX
10
PA_BUF_LT
12
14
PA_LT
16
1 1
AT86RF231
0
1 1
18
0 0
Length [µs]
1 1
Fig-
147

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