ATmega1284PR231 Atmel Corporation, ATmega1284PR231 Datasheet - Page 40

• Manufacturer Part Number: ATmega1284PR231
• Manufacturer: Atmel Corporation

Specifications of ATmega1284PR231

• Flash (kbytes): 128 Kbytes
• Max. Operating Frequency: 20 MHz
• Max I/o Pins: 32
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Crypto Engine: AES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Operating Voltage (vcc): 1.8 to 3.6
• Timers: 3
• Frequency Band: 2.4 GHz
• Max Data Rate (mb/s): 2
• Antenna Diversity: Yes
• External Pa Control: Yes
• Power Output (dbm): 3
• Receiver Sensitivity (dbm): -101
• Receive Current Consumption (ma): 13.2
• Transmit Current Consumption (ma): 14.4
• Link Budget (dbm): 104

7.1.4.2
7.1.4.3
8111C–MCU Wireless–09/09
Wake-up Procedure
PLL_ON and RX_ON States
The wake-up procedure from SLEEP state is shown in
Figure 7-4.
The radio transceivers SLEEP state is left by releasing pin SLP_TR to logic low. This restarts the
XOSC and DVREG. After t
internal clock signal is available and provided to pin 17 (CLKM), if CLKM was enabled.
This procedure is similar to the Power-On Procedure. However the radio transceiver continues
the state change automatically to the TRX_OFF state. During this the filter-tuning network (FTN)
calibration is performed. Entering TRX_OFF state is signaled by IRQ_4 (AWAKE_END), if this
interrupt was enabled by the appropriate mask register bit.
The transition from TRX_OFF to PLL_ON and RX_ON mode is shown in
Figure 7-5.
Note:
In TRX_OFF state, entering the commands PLL_ON or RX_ON initiates a ramp-up sequence of
the internal 1.8V voltage regulator for the analog domain (AVREG). RX_ON state can be
entered any time from PLL_ON state regardless whether the PLL has already locked, which is
indicated by IRQ_0 (PLL_LOCK).
Event
State
Block
Time
Event
State
Block
Command
Time
If TRX_CMD = RX_ON in TRX_OFF state RX_ON state is entered immediately, even if the PLL
has not settled.
SLEEP
TRX_OFF
Wake-up Procedure from SLEEP State
Transmission from TRX_OFF to PLL_ON and RX_ON State
0
SLP_TR = L
XOSC, DVREG
0
AVREG
PLL_ON
TR2
= 380 µs (typ.) the radio transceiver enters TRX_OFF state. The
100
t
TR4
t
TR2
CLKM on
PLL
200
FTN
100
IRQ_4 (AWAKE_END)
TRX_OFF
XOSC, DVREG
IRQ_0 (PLL_LOCK)
PLL_ON
Figure 7-4 on page
R_ON
RX_ON
RX
t
TR8
400
Figure 7-5 on page
AT86RF231
40.
Time [µs]
Time [µs]
40.
40