ATmega1284PR231 Atmel Corporation, ATmega1284PR231 Datasheet - Page 74

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ATmega1284PR231

Manufacturer Part Number
ATmega1284PR231
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega1284PR231

Flash (kbytes)
128 Kbytes
Max. Operating Frequency
20 MHz
Max I/o Pins
32
Spi
3
Twi (i2c)
1
Uart
2
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Crypto Engine
AES
Sram (kbytes)
16
Eeprom (bytes)
4096
Operating Voltage (vcc)
1.8 to 3.6
Timers
3
Frequency Band
2.4 GHz
Max Data Rate (mb/s)
2
Antenna Diversity
Yes
External Pa Control
Yes
Power Output (dbm)
3
Receiver Sensitivity (dbm)
-101
Receive Current Consumption (ma)
13.2
Transmit Current Consumption (ma)
14.4
Link Budget (dbm)
104
8111C–MCU Wireless–09/09
Bit
+0x2E
Read/Write
Reset Value
R/W
AACK_FVN_MODE
7
0
R/W
6
1
• Bit [7:0] - CSMA_SEED_0
This register contains the lower 8-bit of the CSMA_SEED, bits [7:0]. The higher 3 bit are part of
register bits CSMA_SEED_1 (register 0x2E, CSMA_SEED_1). CSMA_SEED is the seed for the
random number generation that determines the length of the back-off period in the CSMA-CA
algorithm.
It is recommended to initialize registers CSMA_SEED by random values. This can be done
using register bits RND_VALUE (register 0x06, PHY_RSSI), refer to
Number Generator” on page
Register 0x2E (CSMA_SEED_1):
The CSMA_SEED_1 register is a control register for RX_AACK and contains a part of the
CSMA_SEED for the CSMA-CA algorithm.
Note:
• Bit [7:6] - AACK_FVN_MODE
The frame control field of the MAC header (MHR) contains a frame version subfield. The setting
of AACK_FVN_MODE specifies the frame filtering behavior of the AT86RF231. According to the
content of these register bits the radio transceiver passes frames with a specific frame version
number, number group, or independent of the frame version number.
Thus the register bit AACK_FVN_MODE defines the maximum acceptable frame version.
Received frames with a higher frame version number than configured do not pass the address
filter and are not acknowledged.
Table 7-19.
The frame version field of the acknowledgment frame is set to 0x00 according to IEEE 802.15.4-
2006, section 7.2.2.3.1, Acknowledgment frame MHR fields.
• Bit 5 - AACK_SET_PD
The content of AACK_SET_PD bit is copied into the frame pending subfield of the acknowledg-
ment frame if the ACK is the answer to a data request MAC command frame.
In addition, if register bits AACK_FVN_MODE (register 0x2E, CSMA_SEED_1) are configured
to accept frames with a frame version other than 0 or 1, the content of register bit
Register Bit
AACK_FVN_MODE
AACK_SET_PD
The register bits CSMA_SEED_0/1 content initializes the TX_ARET random backoff generator
after leaving SLEEP state. To prevent a reinitialization with the same value it is recommended to
reinitialize all register bits with random values before entering SLEEP state.
R/W
5
0
Register Bit Slotted Acknowledgement Operation
AACK_DIS_ACK
R/W
4
0
Value
136.
0
1
2
3
AACK_I_AM_COORD
State Description
Acknowledge frames with version number 0
Acknowledge frames with version number 0 or 1
Acknowledge frames with version number 0 or 1 or 2
Acknowledge independent of frame version number
R/W
3
0
R/W
2
0
CSMA_SEED_1
R/W
1
1
Section 11.2 “Random
AT86RF231
R/W
0
0
CSMA_SEED_1
74

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