ATmega164P Atmel Corporation, ATmega164P Datasheet

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ATmega164P

Manufacturer Part Number
ATmega164P
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega164P

Flash (kbytes)
16 Kbytes
Pin Count
44
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Spi
3
Twi (i2c)
1
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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Features
Note:
High-performance, Low-power Atmel
Advanced RISC Architecture
High Endurance Non-volatile Memory segments
JTAG (IEEE std. 1149.1 Compliant) Interface
Peripheral Features
Special Microcontroller Features
I/O and Packages
Operating Voltages
Speed Grades
Power Consumption at 1 MHz, 1.8V, 25°C for ATmega164P/324P/644PV
– 131 Powerful Instructions – Most Single-clock Cycle Execution
– 32 × 8 General Purpose Working Registers
– Fully Static Operation
– Up to 20 MIPS Throughput at 20 MHz
– On-chip 2-cycle Multiplier
– 16K/32K/64K Bytes of In-System Self-programmable Flash program memory
– 512B/1K/2K Bytes EEPROM
– 1K/2K/4K Bytes Internal SRAM
– Write/Erase Cycles: 10,000 Flash/ 100,000 EEPROM
– Data retention: 20 years at 85°C/100 years at 25°C
– Optional Boot Code Section with Independent Lock Bits
– Programming Lock for Software Security
– Boundary-scan Capabilities According to the JTAG Standard
– Extensive On-chip Debug Support
– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
– Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes
– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode
– Real Time Counter with Separate Oscillator
– Six PWM Channels
– 8-channel, 10-bit ADC
– Byte-oriented Two-wire Serial Interface
– Two Programmable Serial USART
– Master/Slave SPI Serial Interface
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
– Interrupt and Wake-up on Pin Change
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated RC Oscillator
– External and Internal Interrupt Sources
– Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby and
– 32 Programmable I/O Lines
– 40-pin PDIP, 44-lead TQFP, 44-pad VQFN/QFN/MLF (ATmega164P/324P/644P)
– 44-pad DRQFN (
– 1.8V - 5.5V for ATmega164P/324P/644PV
– 2.7V - 5.5V for ATmega164P/324P/644P
– ATmega164P/324P/644PV: 0 - 4 MHz @ 1.8V - 5.5V, 0 - 10 MHz @ 2.7V - 5.5V
– ATmega164P/324P/644P: 0 - 10 MHz @ 2.7V - 5.5V, 0 - 20 MHz @ 4.5V - 5.5V
– Active: 0.4 mA
– Power-down Mode: 0.1 µA
– Power-save Mode: 0.6 µA (Including 32 kHz RTC)
Extended Standby
In-System Programming by On-chip Boot Program
True Read-While-Write Operation
Differential mode with selectable gain at 1×, 10× or 200×
1. See
”Data Retention” on page
ATmega164P
)
®
AVR
8.
®
8-bit Microcontroller
(1)
8-bit
Microcontroller
with
16K/32K/64K
Bytes In-System
Programmable
Flash
ATmega164P/V
ATmega324P/V
ATmega644P/V
Summary
8011OS–AVR–07/10

Related parts for ATmega164P

ATmega164P Summary of contents

Page 1

... Operating Voltages – 1.8V - 5.5V for ATmega164P/324P/644PV – 2.7V - 5.5V for ATmega164P/324P/644P • Speed Grades – ATmega164P/324P/644PV MHz @ 1.8V - 5.5V MHz @ 2.7V - 5.5V – ATmega164P/324P/644P MHz @ 2.7V - 5.5V MHz @ 4.5V - 5.5V • Power Consumption at 1 MHz, 1.8V, 25°C for ATmega164P/324P/644PV – Active: 0.4 mA – Power-down Mode: 0.1 µA – Power-save Mode: 0.6 µA (Including 32 kHz RTC) Note: 1 ...

Page 2

... Pin Configurations 1.1 Pinout - PDIP/TQFP/VQFN/QFN/MLF Figure 1-1. Note: ATmega164P/324P/644P 2 Pinout ATmega164P/324P/644P (PCINT8/XCK0/T0) PB0 (PCINT9/CLKO/T1) PB1 (PCINT10/INT2/AIN0) PB2 (PCINT11/OC0A/AIN1) PB3 (PCINT12/OC0B/SS) PB4 (PCINT13/MOSI) PB5 (PCINT14/MISO) PB6 (PCINT15/SCK) PB7 RESET VCC GND XTAL2 XTAL1 (PCINT24/RXD0) PD0 (PCINT25/TXD0) PD1 (PCINT26/RXD1/INT0) PD2 (PCINT27/TXD1/INT1) PD3 (PCINT28/XCK1/OC1B) PD4 (PCINT29/OC1A) PD5 ...

Page 3

... Pinout - DRQFN Figure 1- Table 1- 8011OS–AVR–07/10 DRQFN - Pinout ATmega164P Top view B1 B15 B2 B14 B3 B13 B4 B12 B5 B11 DRQFN - Pinout ATmega164P/324P PB5 A7 PD3 PB6 B6 PD4 PB7 A8 PD5 RESET B7 PD6 VCC A9 PD7 GND B8 VCC XTAL2 ...

Page 4

... Overview The ATmega164P/324P/644P is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega164P/324P/644P achieves throughputs approaching 1 MIPS per MHz allowing the sys- tem designer to optimize power consumption versus processing speed. 2.1 Block Diagram Figure 2-1 ...

Page 5

... Atmel ATmega164P/324P/644P is a powerful microcontroller that provides a highly flexible and cost effective solution to many embedded control applications. The ATmega164P/324P/644P AVR is supported with a full suite of program and system devel- opment tools including: C compilers, macro assemblers, program debugger/simulators, in-circuit emulators, and evaluation kits. ...

Page 6

... As inputs, Port A pins that are externally pulled low will source current if the pull-up resistors are activated. The Port A pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port A also serves the functions of various special features of the ATmega164P/324P/644P as listed on 2.3.4 Port B (PB7:PB0) Port 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit) ...

Page 7

... through a low-pass filter. CC 2.3.11 AREF This is the analog reference pin for the Analog-to-digital Converter. 8011OS–AVR–07/10 ATmega164P/324P/644P 332. Shorter pulses are not guaranteed to generate a reset. , even if the ADC is not used. If the ADC is used, it should be connected CC ”System and Reset 7 ...

Page 8

... I/O. Typically "LDS" and "STS" combined with "SBRS", "SBRC", "SBR", and "CBR". 3.3 Data Retention Reliability Qualification results show that the projected data retention failure rate is much less than 1 PPM over 20 years at 85°C or 100 years at 25°C. ATmega164P/324P/644P 8 8011OS–AVR–07/10 ...

Page 9

... UMSEL10 - - TXCIE1 UDRIE1 RXEN1 TXEN1 TXC1 UDRE1 FE1 DOR1 - - - USART0 I/O Data Register - - - USART0 Baud Rate Register Low Byte - - - UMSEL00 - - TXCIE0 UDRIE0 RXEN0 TXEN0 ATmega164P/324P/644P Bit 2 Bit 1 Bit ...

Page 10

... OCR1AH (0x88) OCR1AL (0x87) ICR1H (0x86) ICR1L (0x85) TCNT1H (0x84) TCNT1L (0x83) Reserved - (0x82) TCCR1C FOC1A (0x81) TCCR1B ICNC1 (0x80) TCCR1A COM1A1 (0x7F) DIDR1 - ATmega164P/324P/644P 10 Bit 6 Bit 5 Bit 4 Bit 3 TXC0 UDRE0 FE0 DOR0 - - - - - - - - TWAM5 TWAM4 TWAM3 TWAM2 TWEA TWSTA TWSTO TWWC ...

Page 11

... Timer/Counter0 Output Compare Register A Timer/Counter0 (8 Bit) FOC0B - - WGM02 COM0A0 COM0B1 COM0B0 - - - - - - EEPROM Address Register Low Byte EEPROM Data Register - EEPM1 EEPM0 EERIE General Purpose I/O Register ATmega164P/324P/644P Bit 2 Bit 1 Bit 0 ADC2D ADC1D ADC0D - - - - MUX2 MUX1 MUX0 - ADTS2 ADTS1 ADTS0 ADPS2 ADPS1 ADPS0 - - - - ...

Page 12

... When using the I/O specific commands IN and OUT, the I/O addresses $00 - $3F must be used. When addressing I/O regis- ters as data space using LD and ST instructions, $20 must be added to these addresses. The ATmega164P/324P/644P is a complex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for the IN and OUT instructions ...

Page 13

... BRTS k Branch if T Flag Set BRTC k Branch if T Flag Cleared BRVS k Branch if Overflow Flag is Set 8011OS–AVR–07/10 ATmega164P/324P/644P Description Rd ← ← Rdh:Rdl ← Rdh:Rdl + K Rd ← ← ← ← Rdh:Rdl ← Rdh:Rdl - K Rd ← Rd • ← ...

Page 14

... Load Program Memory and Post-Inc ELPM Extended Load Program Memory ELPM Rd, Z Extended Load Program Memory ELPM Rd, Z+ Extended Load Program Memory ATmega164P/324P/644P 14 Description then PC ← then PC ← then PC ← I/O(P,b) ← 1 I/O(P,b) ← 0 Rd(n+1) ← Rd(n), Rd(0) ← 0 Rd(n) ← ...

Page 15

... MCU CONTROL INSTRUCTIONS NOP No Operation SLEEP Sleep WDR Watchdog Reset BREAK Break 8011OS–AVR–07/10 ATmega164P/324P/644P Description (Z) ← R1:R0 Rd ← ← Rr STACK ← ← STACK (see specific descr. for Sleep function) (see specific descr. for WDR/timer) For On-chip Debug Only ...

Page 16

... Thermally Enhanced Plastic Very Thin Quad Flat No-Lead (VQFN) ATmega164P/324P/644P 16 Ordering Code Package (2) ATmega164PV-10AU 44A (2) ATmega164PV-10PU 40P6 (2) ATmega164PV-10MU 44M1 (2) ATmega164P-20AU 44A (2) ATmega164P-20PU 40P6 (2) ATmega164P-20MU 44M1 329. Package Type (1) Operational Range Industrial 8011OS– ...

Page 17

... Thin (1.0 mm) Plastic Gull Wing Quad Flat Package (TQFP) 40P6 40-pin, 0.600” Wide, Plastic Dual Inline Package (PDIP) 44M1 44-pad, 7 × 7 × 1.0 mm Body, lead pitch 0.50 mm, Thermally Enhanced Plastic Very Thin Quad Flat No-Lead (VQFN) 8011OS–AVR–07/10 ATmega164P/324P/644P Ordering Code Package (2) ATmega324PV-10AU 44A ...

Page 18

... Thin (1.0 mm) Plastic Gull Wing Quad Flat Package (TQFP) 40P6 40-pin, 0.600” Wide, Plastic Dual Inline Package (PDIP) 44M1 44-pad, 7 × 7 × 1.0 mm body, lead pitch 0.50 mm, Thermally Enhanced Plastic Very Thin Quad Flat No-Lead (VQFN) ATmega164P/324P/644P 18 Ordering Code Package (2) ATmega644PV-10AU ...

Page 19

... Orchard Parkway San Jose, CA 95131 R 8011OS–AVR–07/10 B PIN 1 IDENTIFIER TITLE 44A, 44-lead Body Size, 1.0 mm Body Thickness, 0.8 mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) ATmega164P/324P/644P A2 A COMMON DIMENSIONS (Unit of Measure = mm) MIN SYMBOL NOM A – – A1 0.05 – ...

Page 20

... SEATING PLANE Notes: 1. This package conforms to JEDEC reference MS-011, Variation AC. 2. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25 mm (0.010"). 2325 Orchard Parkway San Jose, CA 95131 R ATmega164P/324P/644P 20 D PIN 0º ~ 15º REF eB TITLE 40P6, 40-lead (0.600" ...

Page 21

... E TOP VIEW eT/2 A24 B20 0.40 R0. TITLE 44MC, 44QFN (2-Row Staggered 1.00 mm Body, 2.60 x 2.60 mm Exposed Pad, Quad Flat No Lead Package ATmega164P/324P/644P C SIDE VIEW COMMON DIMENSIONS (Unit of Measure = mm) MIN NOM MAX SYMBOL A 0.80 0.90 1.00 A1 0.00 0.02 0.05 b 0.18 0.23 ...

Page 22

... Errata 8.1 ATmega164P 8.1.1 Rev known Errata. 8.2 ATmega324P 8.2.1 Rev known Errata. 8.3 ATmega644P 8.3.1 Rev. A Not sampled. 8.3.2 Rev known Errata. ATmega164P/324P/644P 22 8011OS–AVR–07/10 ...

Page 23

... Updated the table note1 of the Table 25-6 on page Updated ”Typical Characteristics” on page Updated ”Typical Characteristics” on page 339 ATmega164P/324P/644P Table 25-10, “2-wire Serial Bus Require- 2. 50. 420. Removed 44MC and 49C2 packages. 423. in one section ”About” on page 9 ...

Page 24

... Updated Minimum Reference Voltage in Characteristics” on page 336. Updated bit bit field typos in ”Register Summary” on page Added 49-ball VFBGA pinout for ATmega164P/324P in Added 49-ball VFBGA (49C2) to ”Packaging Information” on page and ”Ordering Informa- 326. ”System and Reset Characteristics” rev H update. ” ...

Page 25

... Rev. 8011F- 04/07 1. 9.11 Rev. 8011E - 04/ 8011OS–AVR–07/10 Added 44-pad DRQFN pinout for ATmega164P in Added 49-ball VFBGA pinout for ATmega164P/324P in Added note to ”Address Match Unit” on page Updated ATmega164P ”Ordering Information” on page Added 44-lead QFN (44MC) to ”Packaging Information” on page Added 49-ball VFBGA (49C2) to ” ...

Page 26

... Size Configuration Updated V limits in ”DC Characteristics” on page OL Updated note 3 and 4 in ”DC Characteristics” on page Added note to ”ATmega164P DC Characteristics” on page Added note to ”ATmega324P DC Characteristics” on page Updated Figure 28-13 on page 346 Updated ”DC Characteristics” on page Updated ”DC Characteristics” on page 2 ...

Page 27

... Rev. 8011A - 08/06 1. 8011OS–AVR–07/10 Initial revision. ATmega164P/324P/644P 27 ...

Page 28

... Atmel Corporation. All rights reserved. Atmel®, Atmel logo and combinations thereof AVR®, AVR® logo and others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Microsoft®, Windows®, Microsoft Windows NT® and others are registered trademarks of Microsoft Corporation. Other terms and product names may be trademarks of others ...

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