# ATmega168A Atmel Corporation, ATmega168A Datasheet - Page 13

#### ATmega168A

Manufacturer Part Number

ATmega168A

Description

Manufacturer

Atmel Corporation

#### Specifications of ATmega168A

Flash (kbytes)

16 Kbytes

Pin Count

32

Max. Operating Frequency

20 MHz

Cpu

8-bit AVR

# Of Touch Channels

16

Hardware Qtouch Acquisition

No

Max I/o Pins

23

Ext Interrupts

24

Usb Speed

No

Usb Interface

No

Spi

2

Twi (i2c)

1

Uart

1

Graphic Lcd

No

Video Decoder

No

Camera Interface

No

Adc Channels

8

Adc Resolution (bits)

10

Adc Speed (ksps)

15

Analog Comparators

1

Resistive Touch Screen

No

Temp. Sensor

Yes

Crypto Engine

No

Sram (kbytes)

1

Eeprom (bytes)

512

Self Program Memory

YES

Dram Memory

No

Nand Interface

No

Picopower

No

Temp. Range (deg C)

-40 to 85

I/o Supply Class

1.8 to 5.5

Operating Voltage (vcc)

1.8 to 5.5

Fpu

No

Mpu / Mmu

no / no

Timers

3

Output Compare Channels

6

Input Capture Channels

1

Pwm Channels

6

32khz Rtc

Yes

Calibrated Rc Oscillator

Yes

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Quantity

Price

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8. Instruction Set Summary

8271DS–AVR–05/11

ARITHMETIC AND LOGIC INSTRUCTIONS

ADD

ADC

ADIW

SUB

SUBI

SBC

SBCI

SBIW

AND

ANDI

OR

ORI

EOR

COM

NEG

SBR

CBR

INC

DEC

TST

CLR

SER

MUL

MULS

MULSU

FMUL

FMULS

FMULSU

BRANCH INSTRUCTIONS

RJMP

IJMP

JMP

RCALL

ICALL

CALL

RET

RETI

CPSE

CP

CPC

CPI

SBRC

SBRS

SBIC

SBIS

BRBS

BRBC

BREQ

BRNE

BRCS

BRCC

BRSH

BRLO

BRMI

BRPL

BRGE

BRLT

BRHS

BRHC

BRTS

BRTC

BRVS

BRVC

Mnemonics

(1)

(1)

Rd, Rr

Rd, Rr

Rdl,K

Rd, Rr

Rd, K

Rd, Rr

Rd, K

Rdl,K

Rd, Rr

Rd, K

Rd, Rr

Rd, K

Rd, Rr

Rd

Rd

Rd,K

Rd,K

Rd

Rd

Rd

Rd

Rd

Rd, Rr

Rd, Rr

Rd, Rr

Rd, Rr

Rd, Rr

Rd, Rr

k

k

k

k

Rd,Rr

Rd,Rr

Rd,Rr

Rd,K

Rr, b

Rr, b

P, b

P, b

s, k

s, k

k

k

k

k

k

k

k

k

k

k

k

k

k

k

k

k

Operands

Add two Registers

Add with Carry two Registers

Add Immediate to Word

Subtract two Registers

Subtract Constant from Register

Subtract with Carry two Registers

Subtract with Carry Constant from Reg.

Subtract Immediate from Word

Logical AND Registers

Logical AND Register and Constant

Logical OR Registers

Logical OR Register and Constant

Exclusive OR Registers

One’s Complement

Two’s Complement

Set Bit(s) in Register

Clear Bit(s) in Register

Increment

Decrement

Test for Zero or Minus

Clear Register

Set Register

Multiply Unsigned

Multiply Signed

Multiply Signed with Unsigned

Fractional Multiply Unsigned

Fractional Multiply Signed

Fractional Multiply Signed with Unsigned

Relative Jump

Indirect Jump to (Z)

Direct Jump

Relative Subroutine Call

Indirect Call to (Z)

Direct Subroutine Call

Subroutine Return

Interrupt Return

Compare, Skip if Equal

Compare

Compare with Carry

Compare Register with Immediate

Skip if Bit in Register Cleared

Skip if Bit in Register is Set

Skip if Bit in I/O Register Cleared

Skip if Bit in I/O Register is Set

Branch if Status Flag Set

Branch if Status Flag Cleared

Branch if Equal

Branch if Not Equal

Branch if Carry Set

Branch if Carry Cleared

Branch if Same or Higher

Branch if Lower

Branch if Minus

Branch if Plus

Branch if Greater or Equal, Signed

Branch if Less Than Zero, Signed

Branch if Half Carry Flag Set

Branch if Half Carry Flag Cleared

Branch if T Flag Set

Branch if T Flag Cleared

Branch if Overflow Flag is Set

Branch if Overflow Flag is Cleared

Description

ATmega48A/PA/88A/PA/168A/PA/328/P

Rd ← Rd + Rr

Rd ← Rd + Rr + C

Rdh:Rdl ← Rdh:Rdl + K

Rd ← Rd - Rr

Rd ← Rd - K

Rd ← Rd - Rr - C

Rd ← Rd - K - C

Rdh:Rdl ← Rdh:Rdl - K

Rd ← Rd • Rr

Rd ← Rd • K

Rd ← Rd v Rr

Rd ← Rd v K

Rd ← Rd ⊕ Rr

Rd ← 0xFF − Rd

Rd ← 0x00 − Rd

Rd ← Rd v K

Rd ← Rd • (0xFF - K)

Rd ← Rd + 1

Rd ← Rd − 1

Rd ← Rd • Rd

Rd ← Rd ⊕ Rd

Rd ← 0xFF

R1:R0 ← Rd x Rr

R1:R0 ← Rd x Rr

R1:R0 ← Rd x Rr

R1:R0 ← (Rd x Rr) << 1

R1:R0 ← (Rd x Rr) << 1

R1:R0 ← (Rd x Rr) << 1

PC ← PC + k + 1

PC ← Z

PC ← k

PC ← PC + k + 1

PC ← Z

PC ← k

PC ← STACK

PC ← STACK

if (Rd = Rr) PC ← PC + 2 or 3

Rd − Rr

Rd − Rr − C

Rd − K

if (Rr(b)=0) PC ← PC + 2 or 3

if (Rr(b)=1) PC ← PC + 2 or 3

if (P(b)=0) PC ← PC + 2 or 3

if (P(b)=1) PC ← PC + 2 or 3

if (SREG(s) = 1) then PC←PC+k + 1

if (SREG(s) = 0) then PC←PC+k + 1

if (Z = 1) then PC ← PC + k + 1

if (Z = 0) then PC ← PC + k + 1

if (C = 1) then PC ← PC + k + 1

if (C = 0) then PC ← PC + k + 1

if (C = 0) then PC ← PC + k + 1

if (C = 1) then PC ← PC + k + 1

if (N = 1) then PC ← PC + k + 1

if (N = 0) then PC ← PC + k + 1

if (N ⊕ V= 0) then PC ← PC + k + 1

if (N ⊕ V= 1) then PC ← PC + k + 1

if (H = 1) then PC ← PC + k + 1

if (H = 0) then PC ← PC + k + 1

if (T = 1) then PC ← PC + k + 1

if (T = 0) then PC ← PC + k + 1

if (V = 1) then PC ← PC + k + 1

if (V = 0) then PC ← PC + k + 1

Operation

Z,C,N,V,H

Z,C,N,V,H

Z,C,N,V,S

Z,C,N,V,H

Z,C,N,V,H

Z,C,N,V,H

Z,C,N,V,H

Z,C,N,V,S

Z,N,V

Z,N,V

Z,N,V

Z,N,V

Z,N,V

Z,C,N,V

Z,C,N,V,H

Z,N,V

Z,N,V

Z,N,V

Z,N,V

Z,N,V

Z,N,V

None

Z,C

Z,C

Z,C

Z,C

Z,C

Z,C

None

None

None

None

None

None

None

I

None

Z, N,V,C,H

Z, N,V,C,H

Z, N,V,C,H

None

None

None

None

None

None

None

None

None

None

None

None

None

None

None

None

None

None

None

None

None

None

Flags

#Clocks

1/2/3

1/2/3

1/2/3

1/2/3

1/2/3

1/2

1/2

1/2

1/2

1/2

1/2

1/2

1/2

1/2

1/2

1/2

1/2

1/2

1/2

1/2

1/2

1/2

1/2

1

1

2

1

1

1

1

2

1

1

1

1

1

1

1

1

1

1

1

1

1

1

2

2

2

2

2

2

2

2

3

3

3

4

4

4

1

1

1

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