ATmega16M1 Automotive Atmel Corporation, ATmega16M1 Automotive Datasheet

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ATmega16M1 Automotive

Manufacturer Part Number
ATmega16M1 Automotive
Description
Manufacturer
Atmel Corporation

Specifications of ATmega16M1 Automotive

Flash (kbytes)
16 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 150
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
14
Input Capture Channels
1
Pwm Channels
10
32khz Rtc
No
Calibrated Rc Oscillator
Yes
Features
1.
High Performance, Low Power AVR ® 8-bit Microcontroller
Advanced RISC Architecture
Data and Non-Volatile Program Memory
Programming Lock for Flash Program and EEPROM Data Security
1024/2048/4096 Bytes Internal SRAM
On Chip Debug Interface (debugWIRE)
CAN 2.0A/B with 6 Message Objects - ISO 16845 Certified
LIN 2.1 and 1.3 Controller or 8-Bit UART
One 12-bit High Speed PSC (Power Stage Controller) (only ATmega16/32/64M1)
Peripheral Features
Special Microcontroller Features
– 131 Powerful Instructions - Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 1 MIPS throughput per MHz
– On-chip 2-cycle Multiplier
– 16K/32K/64K Bytes Flash of In-System Programmable Program Memory
– Optional Boot Code Section with Independent Lock Bits
– In-System Programming by On-chip Boot Program
– 512/1024/2048 Bytes of In-System Programmable EEPROM
– One 8-bit General purpose Timer/Counter with Separate Prescaler, Compare Mode
– One 16-bit General purpose Timer/Counter with Separate Prescaler, Compare
– One Master/Slave SPI Serial Interface
– 10-bit ADC
– 10-bit DAC for Variable Voltage Reference (Comparators, ADC)
– Four Analog Comparators with Variable Threshold Detection
– 100µA ±3% Current Source (LIN Node Identification)
– Interrupt and Wake-up on Pin Change
– Programmable Watchdog Timer with Separate On-Chip Oscillator
– On-chipTemperature Sensor
– Low Power Idle, Noise Reduction, and Power Down Modes
– Power On Reset and Programmable Brown Out Detection
– In-System Programmable via SPI Port
– High Precision Crystal Oscillator for CAN Operations (16 MHz)
and Capture Mode
Mode and Capture Mode
• Endurance: 10,000 Write/Erase Cycles
• True Read-While-Write Operation
• Endurance: 50,000 Write/Erase Cycles
• Non Overlapping Inverted PWM Output Pins With Flexible Dead-Time
• Variable PWM duty Cycle and Frequency
• Synchronous Update of all PWM Registers
• Auto Stop Function for Emergency Event
• Up To 11 Single Ended Channels and 3 Fully Differential ADC Channel Pairs
• Programmable Gain (5x, 10x, 20x, 40x) on Differential Channels
• Internal Reference Voltage
• Direct Power Supply Voltage Measurement
See certification on Atmel web site. And note on
Section 16.4.3 on page
(1)
175.
8-bit
Microcontroller
with
16K/32K/64K
Bytes In-System
Programmable
Flash
ATmega16M1
ATmega32M1
ATmega64M1
ATmega32C1
ATmega64C1
Automotive
Preliminary
Summary
7647DS–AVR–08/08

Related parts for ATmega16M1 Automotive

ATmega16M1 Automotive Summary of contents

Page 1

Features • High Performance, Low Power AVR ® 8-bit Microcontroller • Advanced RISC Architecture – 131 Powerful Instructions - Most Single Clock Cycle Execution – General Purpose Working Registers – Fully Static Operation – ...

Page 2

Internal Calibrated RC Oscillator ( 8 MHz) – On-chip PLL for fast PWM ( 32 MHz, 64 MHz) and CPU (16 MHz) • Operating Voltage: 2.7V - 5.5V • Extended Operating Temperature: – -40°C to +125°C • Core Speed ...

Page 3

Pin Configurations Figure 1-1. ATmega32/64M1 TQFP32/QFN32 (PCINT18/PSCIN2/OC1A/MISO_A) PD2 (PCINT19/TXD/TXLIN/OC0A/SS/MOSI_A) PD3 Note: ATmega16/32/64/M1/C1 4 ATmega16/32/64M1 TQFP32/QFN32 (7*7 mm) Package (PCINT9/PSCIN1/OC1B/SS_A) PC1 3 VCC 4 GND 5 (PCINT10/T0/TXCAN) PC2 6 (PCINT11/T1/RXCAN/ICP1B) PC3 7 (PCINT0/MISO/PSCOUT2A) PB0 8 On the engineering ...

Page 4

Figure 1-2. ATmega32/64C1 TQFP32/QFN32 (PCINT19/TXD/TXLIN/OC0A/SS/MOSI_A) PD3 Note: 7647DS–AVR–08/08 ATmega32/64C1 TQFP32/QFN32 (7*7 mm) Package (PCINT18/OC1A/MISO_A) PD2 1 2 (PCINT9/OC1B/SS_A) PC1 3 VCC 4 GND 5 (PCINT10/T0/TXCAN) PC2 6 (PCINT11/T1/RXCAN/ICP1B) PC3 7 (PCINT0/MISO) PB0 8 On the first engineering samples (Parts marked ...

Page 5

Pin Descriptions : Table 1-1. QFN32 Pin Number ATmega16/32/64/M1/C1 6 Pin out description Mnemonic Type GND Power Ground: 0V reference AGND Power Analog Ground: 0V ...

Page 6

Table 1-1. QFN32 Pin Number 7647DS–AVR–08/08 Pin out description (Continued) Mnemonic Type PSCIN1 (PSC Digital Input 1) OC1B (Timer 1 Output Compare B) PC1 I/O SS_A (Alternate SPI Slave ...

Page 7

Table 1-1. QFN32 Pin Number Note: 2. Overview The ATmega16/32/64/M1/ low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ...

Page 8

Block Diagram Figure 2-1. The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in ...

Page 9

The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI ports, CAN, LIN/UART and interrupt system to continue functioning. The Power-down mode saves the regis- ter contents but freezes the Oscillator, disabling all other chip functions until the ...

Page 10

Port B (PB7..PB0) Port 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port B ...

Page 11

The various special features of Port E are elaborated in 78 and “Clock Systems and their Distribution” on page 2.3.7 AVCC AVCC is the supply voltage pin for the A/D Converter, D/A Converter, Current source. It should be externally connected ...

Page 12

Register Summary Address Name Bit 7 (0xFF) Reserved – (0xFE) Reserved – (0xFD) Reserved – (0xFC) Reserved – (0xFB) Reserved – MSG 7 (0xFA) CANMSG TIMSTM15 (0xF9) CANSTMPH TIMSTM7 (0xF8) CANSTMPL IDMSK28 (0xF7) CANIDM1 IDMSK20 (0xF6) CANIDM2 IDMSK12 (0xF5) ...

Page 13

Address Name Bit 7 (0xBE) Reserved – (0xBD) Reserved – (5) (0xBC) – PIFR (5) (0xBB) – PIM (5) (0xBA) POVEN2 PMIC2 (5) (0xB9) POVEN1 PMIC1 (5) (0xB8) POVEN0 PMIC0 (5) (0xB7) PPRE1 PCTL (5) (0xB6) – POC (5) (0xB5) ...

Page 14

Address Name Bit 7 (0x7C) ADMUX REFS1 (0x7B) ADCSRB ADHSM (0x7A) ADCSRA ADEN (0x79) ADCH - / ADC9 (0x78) ADCL ADC7 / ADC1 (0x77) AMP2CSR AMP2EN (0x76) AMP1CSR AMP1EN (0x75) AMP0CSR AMP0EN (0x74) Reserved – (0x73) Reserved – (0x72) Reserved ...

Page 15

Address Name Bit 7 0x1A (0x3A) GPIOR2 GPIOR27 0x19 (0x39) GPIOR1 GPIOR17 0x18 (0x38) Reserved – 0x17 (0x37) Reserved – 0x16 (0x36) TIFR1 – 0x15 (0x35) TIFR0 – 0x14 (0x34) Reserved – 0x13 (0x33) Reserved – 0x12 (0x32) Reserved – ...

Page 16

Instruction Set Summary Mnemonics Operands ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr ADC Rd, Rr ADIW Rdl,K SUB Rd, Rr SUBI Rd, K SBC Rd, Rr SBCI Rd, K SBIW Rdl,K AND Rd, Rr ANDI Rd Rd, ...

Page 17

Mnemonics Operands BRIE k BRID k BIT AND BIT-TEST INSTRUCTIONS SBI P,b CBI P,b LSL Rd LSR Rd ROL Rd ROR Rd ASR Rd SWAP Rd BSET s BCLR s BST Rr, b BLD Rd, b SEC CLC SEN CLN ...

Page 18

Mnemonics Operands POP Rd MCU CONTROL INSTRUCTIONS NOP SLEEP WDR BREAK Note: 7647DS–AVR–08/08 Description Pop Register from Stack No Operation Sleep Watchdog Reset Break 1. These Instructions are only available in “16K and 32K parts” ATmega16/32/64/M1/C1 Operation Flags Rd ← ...

Page 19

Errata 5.1 Errata Summary 5.1.1 ATmega32M1/C1 Rev. C (Mask Revision) • The AMPCMPx bits return 0 5.1.2 ATmega32M1/C1 Rev. B (Mask Revision) • The AMPCMPx bits return 0 • No comparison when amplifier is used as comparator input and ...

Page 20

Slave task of master node: b. For slaves nodes, the workaround parts: The time-out counter is disabled during the RESPONSE when the workaround is set. 5. Wrong TSOFFSET manufacturing calibration value. Erroneous value of TSOFFSET programmed ...

Page 21

Ordering Information ATmega32M1 engineering samples delivery only. Figure 6-1. Memory Size PSC 32K No 32K No 32K No 32K No 32K Yes 32K Yes 32K Yes 32K Yes Note: All packages are Pb free, fully LHF ATmega16/32/64/M1/C1 22 Automotive ...

Page 22

Package Information MA Lead, 7x7 mm Body Size, 1.0 mm Body Thickness 0.5 mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) MA PV, 32-Lead, 5.0x5.0 mm Body, 0.50 mm Pitch Quad Flat No Lead Package ...

Page 23

TQFP32 ATmega16/32/64/M1/C1 24 7647DS–AVR–08/08 ...

Page 24

QFN32 7647DS–AVR–08/08 ATmega16/32/64/M1/C1 25 ...

Page 25

... Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. © 2008 Atmel Corporation. All rights reserved. Atmel marks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. International Atmel Asia ...

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