ATmega32 Atmel Corporation, ATmega32 Datasheet - Page 126

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ATmega32

Manufacturer Part Number
ATmega32
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega32

Flash (kbytes)
32 Kbytes
Pin Count
44
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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2503Q–AVR–02/11
When OC2 is connected to the pin, the function of the COM21:0 bits depends on the WGM21:0
bit setting.
normal or CTC mode (non-PWM).
Table 51. Compare Output Mode, non-PWM Mode
Table 52
mode.
Table 52. Compare Output Mode, Fast PWM Mode
Note:
Table 53
PWM mode
.
Table 53. Compare Output Mode, Phase Correct PWM Mode
Note:
COM21
COM21
COM21
0
0
1
1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR2 equals TOP and COM21 is set. In this case, the compare
1. A special case occurs when OCR2 equals TOP and COM21 is set. In this case, the compare
shows the COM21:0 bit functionality when the WGM21:0 bits are set to phase correct
shows the COM21:0 bit functionality when the WGM21:0 bits are set to fast PWM
COM20
Table 51
match is ignored, but the set or clear is done at TOP. See
more details.
match is ignored, but the set or clear is done at TOP. See
121
0
1
0
1
for more details.
COM20
COM20
0
1
0
1
0
1
0
1
Description
Normal port operation, OC2 disconnected.
Reserved
Clear OC2 on compare match when up-counting. Set OC2 on compare
match when downcounting.
Set OC2 on compare match when up-counting. Clear OC2 on compare
match when downcounting.
shows the COM21:0 bit functionality when the WGM21:0 bits are set to a
Description
Normal port operation, OC2 disconnected.
Reserved
Clear OC2 on compare match, set OC2 at BOTTOM,
(non-inverting mode)
Set OC2 on compare match, clear OC2 at BOTTOM,
(inverting mode)
Description
Normal port operation, OC2 disconnected.
Toggle OC2 on compare match
Clear OC2 on compare match
Set OC2 on compare match
(1)
(1)
“Phase Correct PWM Mode” on page
“Fast PWM Mode” on page 120
ATmega32(L)
126
for

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