ATmega3290A Atmel Corporation, ATmega3290A Datasheet - Page 219
ATmega3290A
Manufacturer Part Number
ATmega3290A
Description
Manufacturer
Atmel Corporation
Specifications of ATmega3290A
Flash (kbytes)
32 Kbytes
Pin Count
100
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
69
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Segment Lcd
160
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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23. Analog to Digital Converter
23.1
23.2
8284D–AVR–6/11
Features
Overview
ATmega169A/PA/329A/PA/3290A/PA/649A/P/6490A/P
When this bit is written logic one, the digital input buffer on the AIN1/0 pin is disabled. The corresponding PIN Register bit will always read as zero when this bit is set. When an analog signal is applied to the AIN1/0 pin and the digital input from this pin is not needed, this bit should be written logic one to reduce power consumption in the digital input buffer.
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The ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P features a
10-bit successive approximation ADC. The ADC is connected to an 8-channel Analog Multi-
plexer which allows eight single-ended voltage inputs constructed from the pins of Port F. The
single-ended voltage inputs refer to 0V (GND).
The ADC contains a Sample and Hold circuit which ensures that the input voltage to the ADC is
held at a constant level during conversion. A block diagram of the ADC is shown in
on page
The ADC has a separate analog supply voltage pin, AVCC. AV
± 0.3V from V
pin.
Internal reference voltages of nominally 1.1V or AVCC are provided On-chip. The voltage refer-
ence may be externally decoupled at the AREF pin by a capacitor for better noise performance.
The PRADC, in
the ADC module.
10-bit Resolution
0.5LSB Integral Non-linearity
± 2LSB Absolute Accuracy
13µs - 260µs Conversion Time (50kHz to 1MHz ADC clock)
Up to 15kSPS at Maximum Resolution (200kHz ADC clock)
Eight Multiplexed Single Ended Input Channels
Optional Left Adjustment for ADC Result Readout
0 - V
Selectable 1.1V ADC Reference Voltage
Free Running or Single Conversion Mode
ADC Start Conversion by Auto Triggering on Interrupt Sources
Interrupt on ADC Conversion Complete
Sleep Mode Noise Canceler
CC
220.
ADC Input Voltage Range
CC
”PRR – Power Reduction Register” on page 46
. See the paragraph
”ADC Noise Canceler” on page 226
must be written to zero to enable
CC
must not differ more than
on how to connect this
Figure 23-1
219
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