ATmega644PR231 Atmel Corporation, ATmega644PR231 Datasheet - Page 13
ATmega644PR231
Manufacturer Part Number
ATmega644PR231
Description
Manufacturer
Atmel Corporation
Specifications of ATmega644PR231
Flash (kbytes)
64 Kbytes
Max. Operating Frequency
20 MHz
Max I/o Pins
32
Spi
3
Twi (i2c)
1
Uart
2
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Crypto Engine
AES
Sram (kbytes)
4
Eeprom (bytes)
2048
Operating Voltage (vcc)
1.8 to 3.6
Timers
3
Frequency Band
2.4 GHz
Max Data Rate (mb/s)
2
Antenna Diversity
Yes
External Pa Control
Yes
Power Output (dbm)
3
Receiver Sensitivity (dbm)
-101
Receive Current Consumption (ma)
13.2
Transmit Current Consumption (ma)
14.4
Link Budget (dbm)
104
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4.4.1
4.5
8011O–AVR–07/10
Stack Pointer
The X-register, Y-register, and Z-register
The registers R26..R31 have some added functions to their general purpose usage. These reg-
isters are 16-bit address pointers for indirect addressing of the data space. The three indirect
address registers X, Y, and Z are defined as described in
Figure 4-3.
In the different addressing modes these address registers have functions as fixed displacement,
automatic increment, and automatic decrement (see the instruction set reference for details).
The Stack is mainly used for storing temporary data, for storing local variables and for storing
return addresses after interrupts and subroutine calls. Note that the Stack is implemented as
growing from higher to lower memory locations. The Stack Pointer Register always points to the
top of the Stack. The Stack Pointer points to the data SRAM Stack area where the Subroutine
and Interrupt Stacks are located. A Stack PUSH command will decrease the Stack Pointer.
The Stack in the data SRAM must be defined by the program before any subroutine calls are
executed or interrupts are enabled. Initial Stack Pointer value equals the last address of the
internal SRAM and the Stack Pointer must be set to point above start of the SRAM, see
5-2 on page
See
Table 4-1.
The AVR Stack Pointer is implemented as two 8-bit registers in the I/O space. The number of
bits actually used is implementation dependent, see
space in some implementations of the AVR architecture is so small that only SPL is needed. In
this case, the SPH Register will not be present.
X-register
Y-register
Z-register
Instruction
PUSH
CALL
ICALL
RCALL
POP
RET
RETI
Table 4-1
20.
The X-, Y-, and Z-registers
Stack Pointer instructions
Stack Pointer
Decremented by 1
Decremented by 2
Incremented by 1
Incremented by 2
for Stack Pointer details.
15
7
R27 (0x1B)
15
7
R29 (0x1D)
15
7
R31 (0x1F)
Data is pushed onto the stack
Return address is pushed onto the stack with a subroutine call or
interrupt
Data is popped from the stack
Return address is popped from the stack with return from
subroutine or return from interrupt
Description
XH
YH
ZH
0
ATmega164P/324P/644P
Table 4-2 on page
0
0
Figure
7
R26 (0x1A)
7
R28 (0x1C)
7
R30 (0x1E)
4-3.
14. Note that the data
XL
YL
ZL
0
Figure
13
0
0
0
0
0
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