ATtiny4 Atmel Corporation, ATtiny4 Datasheet - Page 28
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ATtiny4
Manufacturer Part Number
ATtiny4
Description
Manufacturer
Atmel Corporation
Specifications of ATtiny4
Flash (kbytes)
0.5 Kbytes
Pin Count
6
Max. Operating Frequency
12 MHz
Cpu
8-bit AVR
# Of Touch Channels
1
Hardware Qtouch Acquisition
No
Max I/o Pins
4
Ext Interrupts
4
Usb Speed
No
Usb Interface
No
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.03
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
1
Output Compare Channels
2
Input Capture Channels
1
Pwm Channels
2
32khz Rtc
No
Calibrated Rc Oscillator
Yes
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8.2.1
8.2.2
28
ATtiny4/5/9/10
Power-on Reset
V
CC
Level Monitoring
A Power-on Reset (POR) pulse is generated by an on-chip detection circuit. The detection level
is defined in section
whenever V
Reset, as well as to detect a failure in supply voltage.
A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reaching the
Power-on Reset threshold voltage invokes the delay counter, which determines how long the
device is kept in reset after V
V
Figure 8-2.
Figure 8-3.
ATtiny4/5/9/10 have a V
V
VCC Level Monitoring Control and Status register” on page
The VLM circuit provides a status flag, VLMF, that indicates if voltage on the V
selected trigger level. The flag can be read from VLMCSR, but it is also possible to have an
interrupt generated when the VLMF status flag is set. This interrupt is enabled by the VLMIE bit
in the VLMCSR register. The flag can be cleared by changing the trigger level or by writing it to
zero. The flag is automatically cleared when the voltage at V
trigger level.
TIME-OUT
INTERNAL
TIME-OUT
INTERNAL
CC
CC
RESET
RESET
RESET
decreases below the detection level.
RESET
pin against fixed trigger levels. The trigger levels are set with VLM2:0 bits, see
V
V
CC
CC
CC
MCU Start-up, RESET Tied to V
MCU Start-up, RESET Extended Externally
is below the detection level. The POR circuit can be used to trigger the Start-up
“System and Reset Characteristics” on page
CC
V
V
POT
POT
Level Monitoring (VLM) circuit that compares the voltage level at the
CC
> t
t
TOUT
rise. The reset signal is activated again, without any delay, when
V
TOUT
RST
V
CC
RST
t
TOUT
34.
CC
rises back above the selected
120. The POR is activated
CC
pin is below the
8127E–AVR–11/11
“VLMCSR –