ATtiny85 Atmel Corporation, ATtiny85 Datasheet - Page 153

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ATtiny85

Manufacturer Part Number
ATtiny85
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny85

Flash (kbytes)
8 Kbytes
Pin Count
8
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
3
Hardware Qtouch Acquisition
No
Max I/o Pins
6
Ext Interrupts
6
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
5
Pwm Channels
6
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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20.2.1
20.3
2586N–AVR–04/11
Device Signature Imprint Table
Latching of Fuses
Table 20-5.
Notes:
Note that fuse bits are locked if Lock Bit 1 (LB1) is programmed. Fuse bits should be pro-
grammed before lock bits. The status of fuse bits is not affected by chip erase.
Lock bits can also be read by device firmware. See section
Data from Software” on page
Fuse values are latched when the device enters programming mode and changes to fuse values
will have no effect until the part leaves programming mode. This does not apply to the EESAVE
Fuse which takes effect once it is programmed. Fuses are also latched on power-up.
The device signature imprint table is a dedicated memory area used for storing miscellaneous
device information, such as the device signature and oscillator calibration data. Most of this
memory segment is reserved for internal use, as outlined in
Table 20-6.
Notes:
Fuse Low Byte
CKDIV8
CKOUT
SUT1
SUT0
CKSEL3
CKSEL2
CKSEL1
CKSEL0
Address
0x00
0x01
0x02
0x03
0x04
0x05 ... 0x2A
(3)
(3)
1. See
2. Allows system clock to be output on pin. See
3. The default value gives maximum start-up time for the default clock source. See
4. The default setting selects internal, 8 MHz RC oscillator. See
1. See section “Signature Bytes” for more information.
2. See section “Calibration Bytes” for more information.
(2)
(1)
(4)
(4)
(4)
(4)
page 28
Fuse Low Byte
Contents of Device Signature Imprint Table.
“System Clock Prescaler” on page 31
High Byte
Signature byte 0
Calibration data for internal oscillator at 8.0 MHz
Signature byte 1
Calibration data for internal oscillator at 6.4 MHz
Signature byte 2
Reserved for internal use
for details.
Bit No
7
6
5
4
3
2
1
0
147.
Description
Clock divided by 8
Clock output enabled
Start-up time setting
Start-up time setting
Clock source setting
Clock source setting
Clock source setting
Clock source setting
(1)
(1)
(1)
for details.
“Clock Output Buffer” on page 32
“Reading Lock, Fuse and Signature
Table
(2)
(2)
20-6.
Table 6-6 on page 28
Default Value
0 (programmed)
1 (unprogrammed)
1 (unprogrammed)
0 (programmed)
0 (programmed)
0 (programmed)
1 (unprogrammed)
0 (programmed)
ATtiny25/45/85
(3)
(4)
(4)
(4)
for details.
Table 6-7 on
(3)
(4)
for details.
153

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