ATxmega64A1 Atmel Corporation, ATxmega64A1 Datasheet - Page 152
ATxmega64A1
Manufacturer Part Number
ATxmega64A1
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega64A1
Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
78
Ext Interrupts
78
Usb Speed
No
Usb Interface
No
Spi
12
Twi (i2c)
4
Uart
8
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
8
Output Compare Channels
24
Input Capture Channels
24
Pwm Channels
24
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega64A1-AU
Manufacturer:
Atmel
Quantity:
135
Company:
Part Number:
ATxmega64A1U-AU
Manufacturer:
ATMEL
Quantity:
953
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8077H–AVR–12/09
Figure 14-2. Timer/Counter Block Diagram
The Counter Register (CNT), the Period Registers w/buffer (PER and PERBUF), and the com-
pare and Capture registers w/buffers (CCx and CCxBUF) are 16-bit registers.
During normal operation the counter value is continuously compared to zero and the period
(PER) value to determine whether the counter has reached TOP or BOTTOM.
The counter value is also compared to the CCx registers. These comparators can be used to
generate interrupt requests or request DMA transactions. They also generate events for the
Event System. The waveform generator modes use the comparators to set the waveform period
or pulse width.
A prescaled peripheral clock and events from the Event System can be used for controlling the
counter. The Event System is also used as source to the input capture. Combined with the
Quadrature Decoding functionality in the Event System QDEC, the Timer/Counter can be used
for high speed Quadrature Decoding.
Bus Bridge
Base Counter
Compare/Capture
(x = {A,B,C,D})
Counter
V
V
TEMP
PERBUF
CCxBUF
PER
CNT
CCx
A
=
I/O Data Bus (8-bit)
B
= 0
C
CTRL
D
=
Clock Select
Event Select
E
CKSEL
EVSEL
"count"
"clear"
"load"
"direction"
"capture"
"match"
TOP
BOTTOM
G
Control Logic
Control Logic
INTCTRL
Generation
Waveform
A
B
INTFLAGS
XMEGA A
OVF/UNF
(INT/DMA Req.)
ERRIF
(INT Req.)
OCx Out
CCxIF
(INT/DMA
Req.)
152
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