ATxmega64A1 Atmel Corporation, ATxmega64A1 Datasheet - Page 181
ATxmega64A1
Manufacturer Part Number
ATxmega64A1
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega64A1
Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
78
Ext Interrupts
78
Usb Speed
No
Usb Interface
No
Spi
12
Twi (i2c)
4
Uart
8
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
8
Output Compare Channels
24
Input Capture Channels
24
Pwm Channels
24
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega64A1-AU
Manufacturer:
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Quantity:
135
Company:
Part Number:
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Manufacturer:
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15.6
15.6.1
15.6.2
15.6.3
8077H–AVR–12/09
Fault Protection
Fault Actions
Fault Restore Modes
Change Protection
The Fault Protection feature enables fast and deterministic action when a fault is detected. The
fault protection is event controlled, thus any event from the Event System can be used to trigger
a fault action.
When the Fault Protection is enabled an incoming event from any of the selected event channel
can trigger the event action. Each event channel can be separately enabled as fault protection
input, and the specified event channels will be ORed together allowing multiple event sources
top be used for fault protection at the same time.
Two different even actions can be selected:
When a fault is detected the Fault Detection Flag is set, and the Timer/Counter’s Error Interrupt
Flag is set and the optional interrupt is generated.
From the event occurs in one peripherals until the Fault Protection triggers the event action,
there is maximum two peripheral clock cycles. The Fault Protection is fully independent of the
CPU and DMA, but it requires the Peripheral Clock to run.
After a fault, that is when the fault condition is no longer active, it is selectable how the AWeX
and Timer/Counter can return from fault state and restore with normal operation. Two different
modes are available:
When entering fault state and the Clear Override Enable action is selected, the OUTOVEN[7:0]
bits are reassigned a value on the next UPDATE condition. In pattern generation mode the reg-
ister is restored with the value in the DTLSBUF register. Otherwise the register bits are restored
according to the enabled DTI channels.
When entering fault state and Direction Clear action is select is set, corresponding DIR[7:0] bits
is restored with the value in the DTLSBUF register in pattern generation mode and for the pin
pairs corresponding to enabled DTI channels otherwise.
The UPDATE condition used to restore the normal operation is the same update as in the
Timer/Counter.
To avoid unintentional changes in the fault protection setup all the control registers in the AWeX
Extension can be protected by writing the corresponding lock bit Advanced Waveform Extension
• The Clear Override Enable action will clear the Output Override Enable register (OUTOVEN)
• The Direction Clear action will clear the Direction (DIR) register in the associated port, setting
• In Latched Mode the waveform output will remain in the fault state until the fault condition is
• In Cycle-by-Cycle Mode the waveform output will remain in the fault state until the fault
and disable the output override on all Timer/Counter outputs. The result is that the in the
output will be as set by the port pin configuration.
all port pins as tri-stated inputs.
no longer active and the fault detect flag has been cleared by software. When both of these
conditions are met, the waveform output will return to normal operation at the next UPDATE
condition.
condition is no longer active. When this condition is met, the waveform output will return to
normal operation at the next UPDATE condition.
XMEGA A
181
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