SAM3S1A Atmel Corporation, SAM3S1A Datasheet - Page 1001

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SAM3S1A

Manufacturer Part Number
SAM3S1A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3S1A

Flash (kbytes)
64 Kbytes
Pin Count
48
Max. Operating Frequency
64 MHz
Cpu
Cortex-M3
# Of Touch Channels
17
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
2
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
39.7.8
Name:
Address:
Access:
• LDATA: Last Data Converted
The analog-to-digital conversion data is placed into this register at the end of a conversion and remains until a new conver-
sion is completed.
• CHNB: Channel Number
Indicates the last converted channel when the TAG option is set to 1 in ADC_EMR register. If TAG option is not set,
CHNB = 0.
6500C–ATARM–8-Feb-11
6500C–ATARM–8-Feb-11
31
23
15
7
ADC Last Converted Data Register
30
22
14
ADC_LCDR
0x40038020
Read-only
6
CHNB
29
21
13
5
28
20
12
4
LDATA
27
19
11
3
26
18
10
2
LDATA
25
17
9
1
SAM3S
SAM3S
24
16
8
0
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