SAM3S1A Atmel Corporation, SAM3S1A Datasheet - Page 131

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SAM3S1A

Manufacturer Part Number
SAM3S1A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3S1A

Flash (kbytes)
64 Kbytes
Pin Count
48
Max. Operating Frequency
64 MHz
Cpu
Cortex-M3
# Of Touch Channels
17
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
2
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
10.17.1.4
10.17.1.5
6500C–ATARM–8-Feb-11
B
BLE
B.W
BEQ
BEQ.W
BL
BX
BXNE
BLX
Condition flags
Examples
loopA
ng
target ; Branch to target within 16MB range
target ; Conditionally branch to target
target ; Conditionally branch to target within 1MB
funC
LR
R0
R0
; Branch to loopA
; Conditionally branch to label ng
; Branch with link (Call) to function funC, return address
; stored in LR
; Return from function call
; Conditionally branch to address stored in R0
; Branch with link and exchange (Call) to a address stored
; in R0
Bcond is the only conditional instruction that is not required to be inside an IT block. However, it
has a longer branch range when it is inside an IT block.
These instructions do not change the flags.
• do not use PC in the BLX instruction
• for BX and BLX, bit[0] of Rm must be 1 for correct execution but a branch occurs to the target
• when any of these instructions is inside an IT block, it must be the last instruction of the IT
address created by changing bit[0] to 0
block.
SAM3S
131

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