SAM3S1A Atmel Corporation, SAM3S1A Datasheet - Page 144

• Manufacturer Part Number: SAM3S1A
• Manufacturer: Atmel Corporation

Specifications of SAM3S1A

• Flash (kbytes): 64 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 64 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 34
• Ext Interrupts: 34
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Twi (i2c): 2
• Uart: 3
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1000
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

10.18.7
10.18.7.1
10.18.7.2
10.18.7.3
10.18.7.4
10.18.7.5
144
MSR
SAM3S
CONTROL, R1 ; Read R1 value and write it to the CONTROL register
MSR
Syntax
Operation
Restrictions
Condition flags
Examples
Move the contents of a general-purpose register into the specified special register.
where:
cond
Rn
spec_reg
PRIMASK, BASEPRI, BASEPRI_MAX, FAULTMASK, or CONTROL.
The register access operation in MSR depends on the privilege level. Unprivileged software can
only access the APSR, see
ware can access all special registers.
In unprivileged software writes to unallocated or execution state bits in the PSR are ignored.
When you write to BASEPRI_MAX, the instruction writes to BASEPRI only if either:
See
Rn must not be SP and must not be PC.
This instruction updates the flags explicitly based on the value in Rn.
• Rn is non-zero and the current BASEPRI value is 0
• Rn is non-zero and less than the current BASEPRI value.
MSR{cond} spec_reg, Rn
“MRS” on page
is an optional condition code, see
is the source register.
can be any of: APSR, IPSR, EPSR, IEPSR, IAPSR, EAPSR, PSR, MSP, PSP,
143.
“Application Program Status Register” on page
“Conditional execution” on page
46. Privileged soft-
6500C–ATARM–8-Feb-11
84.