SAM3S1A Atmel Corporation, SAM3S1A Datasheet - Page 219

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SAM3S1A

Manufacturer Part Number
SAM3S1A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3S1A

Flash (kbytes)
64 Kbytes
Pin Count
48
Max. Operating Frequency
64 MHz
Cpu
Cortex-M3
# Of Touch Channels
17
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
2
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
11.5.3.1
11.5.4
11.5.5
6500C–ATARM–8-Feb-11
FPB (Flash Patch Breakpoint)
DWT (Data Watchpoint and Trace)
SW-DP and JTAG-DP Selection Mechanism
When the Serial Wire Debug Port is active, TDO/TRACESWO can be used for trace. The asyn-
chronous TRACE output (TRACESWO) is multiplexed with TDO. So the asynchronous trace
can only be used with SW-DP, not JTAG-DP.
Table 11-2.
SW-DP or JTAG-DP mode is selected when JTAGSEL is low. It is not possible to switch directly
between SWJ-DP and JTAG boundary scan operations. A chip reset must be performed after
JTAGSEL is changed.
Debug port selection mechanism is done by sending specific SWDIOTMS sequence. The JTAG-
DP is selected by default after reset.
The FPB:
The FPB unit contains:
The DWT contains four comparators which can be configured to generate the following:
Pin Name
TMS/SWDIO
TCK/SWCLK
TDI
TDO/TRACESWO
• Switch from JTAG-DP to SW-DP. The sequence is:
• Switch from SWD to JTAG. The sequence is:
• Implements hardware breakpoints
• Patches code and data from code space to system space.
• Two literal comparators for matching against literal loads from Code space, and remapping to
• Six instruction comparators for matching against instruction fetches from Code space and
• Alternatively, comparators can also be configured to generate a Breakpoint instruction to the
• PC sampling packets at set intervals
• PC or Data watchpoint packets
a corresponding area in System space.
remapping to a corresponding area in System space.
processor core on a match.
– Send more than 50 SWCLKTCK cycles with SWDIOTMS = 1
– Send the 16-bit sequence on SWDIOTMS = 0111100111100111 (0x79E7 MSB first)
– Send more than 50 SWCLKTCK cycles with SWDIOTMS = 1
– Send more than 50 SWCLKTCK cycles with SWDIOTMS = 1
– Send the 16-bit sequence on SWDIOTMS = 0011110011100111 (0x3CE7 MSB first)
– Send more than 50 SWCLKTCK cycles with SWDIOTMS = 1
SWJ-DP Pin List
JTAG Port
TMS
TDO
TCK
TDI
TRACESWO (optional: trace)
Serial Wire Debug Port
SWCLK
SWDIO
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SAM3S
219

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