SAM3S1A Atmel Corporation, SAM3S1A Datasheet - Page 295

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SAM3S1A

Manufacturer Part Number
SAM3S1A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3S1A

Flash (kbytes)
64 Kbytes
Pin Count
48
Max. Operating Frequency
64 MHz
Cpu
Cortex-M3
# Of Touch Channels
17
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
2
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
18.3.3
6500C–ATARM–8-Feb-11
Flash Commands
The Enhanced Embedded Flash Controller (EEFC) offers a set of commands such as program-
ming the memory Flash, locking and unlocking lock regions, consecutive programming and
locking and full Flash erasing, etc.
Commands and read operations can be performed in parallel only on different memory planes.
Code can be fetched from one memory plane while a write or an erase operation is performed
on another.
Table 18-2.
In order to perform one of these commands, the Flash Command Register (EEFC_FCR) has to
be written with the correct command using the FCMD field. As soon as the EEFC_FCR register
is written, the FRDY flag and the FVALUE field in the EEFC_FRR register are automatically
cleared. Once the current command is achieved, then the FRDY flag is automatically set. If an
interrupt has been enabled by setting the FRDY bit in EEFC_FMR, the corresponding interrupt
line of the NVIC is activated. (Note that this is true for all commands except for the STUI Com-
mand. The FRDY flag is not set when the STUI command is achieved.)
All the commands are protected by the same keyword, which has to be written in the 8 highest
bits of the EEFC_FCR register.
Writing EEFC_FCR with data that does not contain the correct key and/or with an invalid com-
mand has no effect on the whole memory plane, but the FCMDE flag is set in the EEFC_FSR
register. This flag is automatically cleared by a read access to the EEFC_FSR register.
When the current command writes or erases a page in a locked region, the command has no
effect on the whole memory plane, but the FLOCKE flag is set in the EEFC_FSR register. This
flag is automatically cleared by a read access to the EEFC_FSR register.
Command
Get Flash Descriptor
Write page
Write page and lock
Erase page and write page
Erase page and write page then lock
Erase all
Set Lock Bit
Clear Lock Bit
Get Lock Bit
Set GPNVM Bit
Clear GPNVM Bit
Get GPNVM Bit
Start Read Unique Identifier
Stop Read Unique Identifier
Get CALIB Bit
Set of Commands
Value
0x00
0x03
0x05
0x08
0x09
0x0F
0x10
0x01
0x02
0x04
0x0A
0x0B
0x0C
0x0D
0x0E
Mnemonic
GETD
WP
WPL
EWP
EWPL
EA
SLB
CLB
GLB
SGPB
CGPB
GGPB
STUI
SPUI
GCALB
SAM3S
295

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