SAM3S1A Atmel Corporation, SAM3S1A Datasheet - Page 370

• Manufacturer Part Number: SAM3S1A
• Manufacturer: Atmel Corporation

Specifications of SAM3S1A

• Flash (kbytes): 64 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 64 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 34
• Ext Interrupts: 34
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Twi (i2c): 2
• Uart: 3
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1000
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

23.8.1.5
23.8.2
23.8.2.1
23.8.2.2
370
SAM3S
Read Mode
Null Pulse
Read is Controlled by NRD (READ_MODE = 1):
Read is Controlled by NCS (READ_MODE = 0)
Programming null pulse is not permitted. Pulse must be at least set to 1. A null value leads to
unpredictable behavior.
As NCS and NRD waveforms are defined independently of one other, the SMC needs to know
when the read data is available on the data bus. The SMC does not compare NCS and NRD tim-
ings to know which signal rises first. The READ_MODE parameter in the SMC_MODE register
of the corresponding chip select indicates which signal of NRD and NCS controls the read
operation.
Figure 23-7
data is available t
In this case, the READ_MODE must be set to 1 (read is controlled by NRD), to indicate that data
is available with the rising edge of NRD. The SMC samples the read data internally on the rising
edge of Master Clock that generates the rising edge of NRD, whatever the programmed wave-
form of NCS may be.
Figure 23-7. READ_MODE = 1: Data is sampled by SMC before the rising edge of NRD
Figure 23-8
falling edge of the NCS signal and remains valid until the rising edge of NCS. Data must be sam-
pled when NCS is raised. In that case, the READ_MODE must be set to 0 (read is controlled by
NCS): the SMC internally samples the data on the rising edge of Master Clock that generates
the rising edge of NCS, whatever the programmed waveform of NRD may be.
A[23:0]
D[7:0]
MCK
NRD
NCS
shows the waveforms of a read operation of a typical asynchronous RAM. The read
shows the typical read cycle of an LCD module. The read data is valid t
PACC
after the falling edge of NRD, and turns to ‘Z’ after the rising edge of NRD.
t
PACC
Data Sampling
6500C–ATARM–8-Feb-11
PACC
after the