SAM3S1A Atmel Corporation, SAM3S1A Datasheet - Page 426

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SAM3S1A

Manufacturer Part Number
SAM3S1A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3S1A

Flash (kbytes)
64 Kbytes
Pin Count
48
Max. Operating Frequency
64 MHz
Cpu
Cortex-M3
# Of Touch Channels
17
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
2
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
25.5.3
25.5.4
25.5.5
426
SAM3S
3 to 20 MHz Crystal or Ceramic Resonator-based Oscillator
Main Clock Oscillator Selection
Main Clock Frequency Counter
After reset, the 3 to 20 MHz Crystal or Ceramic Resonator-based oscillator is disabled and it is
not selected as the source of MAINCK.
The user can select the 3 to 20 MHz Crystal or Ceramic Resonator-based oscillator to be the
source of MAINCK, as it provides a more accurate frequency. The software enables or disables
the main oscillator so as to reduce power consumption by clearing the MOSCXTEN bit in the
Main Oscillator Register (CKGR_MOR).
When disabling the main oscillator by clearing the MOSCXTEN bit in CKGR_MOR, the
MOSCXTS bit in PMC_SR is automatically cleared, indicating the Main Clock is off.
When enabling the main oscillator, the user must initiate the main oscillator counter with a value
corresponding to the startup time of the oscillator. This startup time depends on the crystal fre-
quency connected to the oscillator.
When the MOSCXTEN bit and the MOSCXTCNT are written in CKGR_MOR to enable the main
oscillator, the XIN and XOUT pins are automatically switched into oscillator mode and
MOSCXTS bit in the Power Management Controller Status Register (PMC_SR) is cleared and
the counter starts counting down on the slow clock divided by 8 from the MOSCXTCNT value.
Since the MOSCXTCNT value is coded with 8 bits, the maximum startup time is about 62 ms.
When the counter reaches 0, the MOSCXTS bit is set, indicating that the main clock is valid.
Setting the MOSCXTS bit in PMC_IMR can trigger an interrupt to the processor.
The user can select either the 4/8/12 MHz Fast RC oscillator or the 3 to 20 MHz Crystal or
Ceramic Resonator-based oscillator to be the source of Main Clock.
The advantage of the 4/8/12 MHz Fast RC oscillator is that it provides fast startup time, this is
why it is selected by default (to start up the system) and when entering Wait Mode.
The advantage of the 3 to 20 MHz Crystal or Ceramic Resonator-based oscillator is that it is very
accurate.
The selection is made by writing the MOSCSEL bit in the Main Oscillator Register
(CKGR_MOR). The switch of the Main Clock source is glitch free, so there is no need to run out
of SLCK, PLLACK or PLLBCK in order to change the selection. The MOSCSELS bit of the
Power Management Controller Status Register (PMC_SR) allows knowing when the switch
sequence is done.
Setting the MOSCSELS bit in PMC_IMR can trigger an interrupt to the processor.
The device features a Main Clock frequency counter that provides the frequency of the Main
Clock.
The Main Clock frequency counter is reset and starts incrementing at the Main Clock speed after
the next rising edge of the Slow Clock in the following cases:
• when the 4/8/12 MHz Fast RC oscillator clock is selected as the source of Main Clock and
• when the 3 to 20 MHz Crystal or Ceramic Resonator-based oscillator is selected as the
when this oscillator becomes stable (i.e., when the MOSCRCS bit is set)
source of Main Clock and when this oscillator becomes stable (i.e., when the MOSCXTS bit
is set)
6500C–ATARM–8-Feb-11

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