SAM3S1A Atmel Corporation, SAM3S1A Datasheet - Page 43

• Manufacturer Part Number: SAM3S1A
• Manufacturer: Atmel Corporation

Specifications of SAM3S1A

• Flash (kbytes): 64 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 64 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 34
• Ext Interrupts: 34
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Twi (i2c): 2
• Uart: 3
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1000
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

10.4.3
6500C–ATARM–8-Feb-11
Core registers
decrements the stack pointer and then writes the item to the new memory location. The proces-
sor implements two stacks, the main stack and the process stack, with independent copies of
the stack pointer, see
In Thread mode, the CONTROL register controls whether the processor uses the main stack or
the process stack, see
uses the main stack. The options for processor operations are:
Table 10-1.
1.
The processor core registers are:
Processor
mode
Thread
Handler
Program Counter
Low registers
High registers
Stack Pointer
Link Register
See
“CONTROL register” on page
Summary of processor mode, execution privilege level, and stack use options
Used to
execute
Applications
Exception
handlers
“Stack Pointer” on page
FAULTMASK
“CONTROL register” on page
CONTROL
PRIMASK
BASEPRI
SP (R13)
LR (R14)
PC (R15)
PSR
R10
R11
R12
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
Privilege level for
software execution
Privileged or
unprivileged
Always privileged
51.
General-purpose registers
Program status register
Exception mask registers
CONTROL register
PSP
(1)
44.
‡
51. In Handler mode, the processor always
MSP
Stack used
Main stack or process
stack
Main stack
‡
(1)
Special registers
‡
Banked version of SP
SAM3S
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