SAM3S1A Atmel Corporation, SAM3S1A Datasheet - Page 44

• Manufacturer Part Number: SAM3S1A
• Manufacturer: Atmel Corporation

Specifications of SAM3S1A

• Flash (kbytes): 64 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 64 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 34
• Ext Interrupts: 34
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Twi (i2c): 2
• Uart: 3
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1000
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

10.4.3.1
10.4.3.2
10.4.3.3
10.4.3.4
44
SAM3S
General-purpose registers
Stack Pointer
Link Register
Program Counter
Table 10-2.
1.
2.
R0-R12 are 32-bit general-purpose registers for data operations.
The Stack Pointer (SP) is register R13. In Thread mode, bit[1] of the CONTROL register indi-
cates the stack pointer to use:
On reset, the processor loads the MSP with the value from address 0x00000000.
The Link Register (LR) is register R14. It stores the return information for subroutines, function
calls, and exceptions. On reset, the processor loads the LR value 0xFFFFFFFF
The Program Counter (PC) is register R15. It contains the current program address. Bit[0] is
always 0 because instruction fetches must be halfword aligned. On reset, the processor loads
the PC with the value of the reset vector, which is at address 0x00000004.
Name
R0-R12
MSP
PSP
LR
PC
PSR
ASPR
IPSR
EPSR
PRIMASK
FAULTMASK
BASEPRI
CONTROL
• 0 = Main Stack Pointer (MSP). This is the reset value.
• 1 = Process Stack Pointer (PSP).
Describes access type during program execution in thread mode and Handler mode. Debug
An entry of Either means privileged and unprivileged software can access the register.
access can differ.
Core register set summary
Type
RW
RW
RW
RW
RW
RW
RW
RO
RO
RW
RW
RW
RW
(1)
Privileged
Either
Privileged
Required
privilege
Either
Either
Either
Either
Privileged
Privileged
Privileged
Privileged
Privileged
Privileged
(2)
Reset
value
Unknown
See description
Unknown
0xFFFFFFFF
See description
0x01000000
0x00000000
0x00000000
0x01000000
0x00000000
0x00000000
0x00000000
0x00000000
Description
“General-purpose registers” on page 44
“Stack Pointer” on page 44
“Stack Pointer” on page 44
“Link Register” on page 44
“Program Counter” on page 44
“Program Status Register” on page 45
“Application Program Status Register” on page
46
“Interrupt Program Status Register” on page 47
“Execution Program Status Register” on page 48
“Priority Mask Register” on page 49
“Fault Mask Register” on page 49
“Base Priority Mask Register” on page 50
“CONTROL register” on page 51
6500C–ATARM–8-Feb-11
.