SAM3S1A Atmel Corporation, SAM3S1A Datasheet - Page 491

• Manufacturer Part Number: SAM3S1A
• Manufacturer: Atmel Corporation

Specifications of SAM3S1A

• Flash (kbytes): 64 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 64 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 34
• Ext Interrupts: 34
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Twi (i2c): 2
• Uart: 3
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1000
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Figure 28-7. Event Detector on Input Lines (Figure represents line 0)
28.5.10.1
28.5.10.2
28.5.10.3
28.5.10.4
6500C–ATARM–8-Feb-11
6500C–ATARM–8-Feb-11
Resynchronized input on line 0
Example
Interrupt Mode Configuration
Edge or Level Detection Configuration
Falling/Rising Edge or Low/High Level Detection Configuration.
If generating an interrupt is required on the following:
The configuration required is described below.
All the interrupt sources are enabled by writing 32’hFFFF_FFFF in PIO_IER.
Then the Additional Interrupt Mode is enabled for line 0 to 7 by writing 32’h0000_00FF in
PIO_AIMER.
Lines 3, 4 and 5 are configured in Level detection by writing 32’h0000_0038 in PIO_LSR.
The other lines are configured in Edge detection by default, if they have not been previously con-
figured. Otherwise, lines 0, 1, 2, 6 and 7 must be configured in Edge detection by writing
32’h0000_00C7 in PIO_ESR.
Lines 0, 2, 4, 5 and 7 are configured in Rising Edge or High Level detection by writing
32’h0000_00B5 in PIO_REHLSR.
• Rising edge on PIO line 0
• Falling edge on PIO line 1
• Rising edge on PIO line 2
• Low Level on PIO line 3
• High Level on PIO line 4
• High Level on PIO line 5
• Falling edge on PIO line 6
• Rising edge on PIO line 7
• Any edge on the other lines
PIO_REHLSR[0]
PIO_FELLSR[0]
Rising Edge
Falling Edge
Detector
High Level
Low Level
Detector
Detector
Detector
Detector
Edge
PIO_FRLHSR[0]
0
0
1
1
PIO_LSR[0]
PIO_ESR[0]
PIO_ELSR[0]
1
0
PIO_AIMER[0]
PIO_AIMDR[0]
PIO_AIMMR[0]
1
0
Event detection on line 0
Event Detector
SAM3S
SAM3S
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