SAM3S1A Atmel Corporation, SAM3S1A Datasheet - Page 808

• Manufacturer Part Number: SAM3S1A
• Manufacturer: Atmel Corporation

Specifications of SAM3S1A

• Flash (kbytes): 64 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 64 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 34
• Ext Interrupts: 34
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Twi (i2c): 2
• Uart: 3
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1000
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

808
SAM3S
The following flowchart
the PDC. Polling or interrupt method can be used to wait for the end of write according to the
contents of the Interrupt Mask Register (HSMCI_IMR).
Figure 35-10. Multiple Write Functional Flow Diagram
Note:
1. It is assumed that this command has been correctly sent (see
(Figure
Configure the PDC channel
HSMCI_TPR = Data Buffer Address
HSMCI_TCR = BlockLength/4
Send SET_BLOCKLEN command
35-10) shows how to manage a multiple write block transfer with
Send SELECT/DESELECT_CARD
Send WRITE_MULTIPLE_BLOCK
Read status register HSMCI_SR
Set the PDCMODE bit
HSMCI_MR |= PDCMODE
Set the block length
HSMCI_MR |= (BlockLength << 16)
command
Send STOP_TRANSMISSION
HSMCI_PTCR = TXTEN
NOTBUSY = 0?
command
command
(1)
RETURN
BLKE = 0?
Poll the bit
Poll the bit
to select the card
No
No
(1)
(1)
(1)
Yes
Yes
Figure
35-7).
6500C–ATARM–8-Feb-11