SAM3S1A Atmel Corporation, SAM3S1A Datasheet - Page 823

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SAM3S1A

Manufacturer Part Number
SAM3S1A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3S1A

Flash (kbytes)
64 Kbytes
Pin Count
48
Max. Operating Frequency
64 MHz
Cpu
Cortex-M3
# Of Touch Channels
17
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
2
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
SAM3S
• ATACS: ATA with Command Completion Signal
0 (NORMAL) = Normal operation mode.
1 (COMPLETION) = This bit indicates that a completion signal is expected within a programmed amount of time
(HSMCI_CSTOR).
• BOOT_ACK: Boot Operation Acknowledge.
The master can choose to receive the boot acknowledge from the slave when a Boot Request command is issued. When
set to one this field indicates that a Boot acknowledge is expected within a programmable amount of time defined with
DTOMUL and DTOCYC fields located in the HSMCI_DTOR register. If the acknowledge pattern is not received then an
acknowledge timeout error is raised. If the acknowledge pattern is corrupted then an acknowledge pattern error is set.
823
6500C–ATARM–8-Feb-11

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