SAM3S1A Atmel Corporation, SAM3S1A Datasheet - Page 850

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SAM3S1A

Manufacturer Part Number
SAM3S1A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3S1A

Flash (kbytes)
64 Kbytes
Pin Count
48
Max. Operating Frequency
64 MHz
Cpu
Cortex-M3
# Of Touch Channels
17
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
2
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
36.6.2
36.6.2.1
Figure 36-3. Functional View of the Channel Block Diagram
850
Peripheral Bus
Generator
from APB
Clock
from
z = 0 (x = 0, y = 1),
z = 1 (x = 2, y = 3),
z = 2 (x = 4, y = 5),
z = 3 (x = 6, y = 7)
SAM3S
PWM Channel
Block Diagram
Selector
Clock
2-bit gray
counter z
Each of the 4 channels is composed of six blocks:
• A clock selector which selects one of the clocks provided by the clock generator (described in
• A counter clocked by the output of the clock selector. This counter is incremented or
• A comparator used to compute the OCx output waveform according to the counter value and
• A 2-bit configurable gray counter enables the stepper motor driver. One gray counter drives 2
• A dead-time generator providing two complementary outputs (DTOHx/DTOLx) which allows
• An output override block that can force the two complementary outputs to a programmed
• An asynchronous fault protection mechanism that has the highest priority to override the two
Section 36.6.1 on page
decremented according to the channel configuration and comparators matches. The size of
the counter is 16 bits.
the configuration. The counter value can be the one of the channel counter or the one of the
channel 0 counter according to SYNCx bit in the
page 888
channels.
to drive external power control switches safely.
value (OOOHx/OOOLx).
complementary outputs in case of fault detection (PWMHx/PWMLx).
Duty-Cycle
Channel x
Channel 0
Counter
Update
Counter
Period
(PWM_SCM).
MUX
Comparator
Comparator
SYNCx
848).
x
y
OCx
OCy
Dead-Time
Dead-Time
Generator
Generator
“PWM Sync Channels Mode Register” on
Channel y (= x+1)
DTOHx
DTOLx
DTOHy
DTOLy
Channel x
Override
Override
Output
Output
OOOHx
OOOLx
OOOHy
OOOLy
Protection
Protection
6500C–ATARM–8-Feb-11
Fault
Fault
PWMHx
PWMLx
PWMHy
PWMLy

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