SAM3S1A Atmel Corporation, SAM3S1A Datasheet - Page 938

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SAM3S1A

Manufacturer Part Number
SAM3S1A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3S1A

Flash (kbytes)
64 Kbytes
Pin Count
48
Max. Operating Frequency
64 MHz
Cpu
Cortex-M3
# Of Touch Channels
17
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
2
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
938
SAM3S
When a setup transaction is received after a stall handshake, STALLSENT must be cleared in
order to prevent interrupts due to STALLSENT being set.
Figure 37-12. Stall Handshake (Data IN Transfer)
Figure 37-13. Stall Handshake (Data OUT Transfer)
3. The microcontroller is notified that the device has sent the stall by polling the
USB Bus
Packets
FORCESTALL
STALLSENT
USB Bus
Packets
FORCESTALL
STALLSENT
STALLSENT to be set. An endpoint interrupt is pending while STALLSENT is set. The
microcontroller must clear STALLSENT to clear the interrupt.
Data OUT PID
Data IN
PID
Set by USB Device
Data OUT
Stall PID
Set by Firmware
Stall PID
Set by Firmware
Interrupt Pending
Interrupt Pending
Set by
USB Device
Cleared by Firmware
Cleared by Firmware
Cleared by Firmware
6500C–ATARM–8-Feb-11

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