SAM3S1A Atmel Corporation, SAM3S1A Datasheet - Page 999

• Manufacturer Part Number: SAM3S1A
• Manufacturer: Atmel Corporation

Specifications of SAM3S1A

• Flash (kbytes): 64 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 64 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 34
• Ext Interrupts: 34
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Twi (i2c): 2
• Uart: 3
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1000
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

39.7.6
Name:
Address:
Access:
This register can only be written if the WPEN bit is cleared in
• CHx: Channel x Disable
0 = No effect.
1 = Disables the corresponding channel.
Warning: If the corresponding channel is disabled during a conversion or if it is disabled then reenabled during a conver-
sion, its associated data and its corresponding EOC and OVRE flags in ADC_SR are unpredictable.
6500C–ATARM–8-Feb-11
6500C–ATARM–8-Feb-11
CH15
CH7
31
23
15
–
–
7
ADC Channel Disable Register
CH14
CH6
30
22
14
ADC_CHDR
0x40038014
Write-only
–
–
6
CH13
CH5
29
21
13
–
–
5
CH12
CH4
28
20
12
–
–
4
“ADC Write Protect Mode Register” on page
CH11
CH3
27
19
11
–
–
3
CH10
CH2
26
18
10
–
–
2
CH9
CH1
25
17
–
–
9
1
1013.
SAM3S
SAM3S
CH8
CH0
24
16
–
–
8
0
999
999