SAM3S1B Atmel Corporation, SAM3S1B Datasheet - Page 282

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SAM3S1B

Manufacturer Part Number
SAM3S1B
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3S1B

Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
64 MHz
Cpu
Cortex-M3
# Of Touch Channels
23
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
10
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
• SMSMPL: Supply Monitor Sampling Period
• SMRSTEN: Supply Monitor Reset Enable
0 (NOT_ENABLE) = the core reset signal “vddcore_nreset” is not affected when a supply monitor detection occurs.
1 (ENABLE) = the core reset signal, vddcore_nreset is asserted when a supply monitor detection occurs.
• SMIEN: Supply Monitor Interrupt Enable
0 (NOT_ENABLE) = the SUPC interrupt signal is not affected when a supply monitor detection occurs.
1 (ENABLE) = the SUPC interrupt signal is asserted when a supply monitor detection occurs.
282
0x5-0x7
Value
0x0
0x1
0x2
0x3
0x4
SAM3S
2048SLCK
256SLCK
Reserved
32SLCK
Name
SMD
CSM
Description
Supply Monitor disabled
Continuous Supply Monitor
Supply Monitor enabled one SLCK period every 32 SLCK periods
Supply Monitor enabled one SLCK period every 256 SLCK periods
Supply Monitor enabled one SLCK period every 2,048 SLCK periods
Reserved
6500C–ATARM–8-Feb-11

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