SAM3S1B Atmel Corporation, SAM3S1B Datasheet - Page 363

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SAM3S1B

Manufacturer Part Number
SAM3S1B
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3S1B

Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
64 MHz
Cpu
Cortex-M3
# Of Touch Channels
23
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
10
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
23.5
6500C–ATARM–8-Feb-11
External Memory Mapping
The SMC provides up to 24 address lines, A[23:0]. This allows each chip select line to address
up to 16 Mbytes of memory.
If the physical memory device connected on one chip select is smaller than 16 Mbytes, it wraps
around and appears to be repeated within this space. The SMC correctly handles any valid
access to the memory device within the page (see
Figure 23-1.
SMC
NCS[0] - NCS[3]
Memory Connections for Four External Devices
A[23:0]
D[7:0]
NWE
NRD
Figure
23-1).
24
8
NCS0
NCS1
NCS2
A[23:0]
Memory Enable
Output Enable
Write Enable
D[7:0]
NCS3
Memory Enable
Memory Enable
Memory Enable
SAM3S
363

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