SAM3S1B Atmel Corporation, SAM3S1B Datasheet - Page 497

• Manufacturer Part Number: SAM3S1B
• Manufacturer: Atmel Corporation

Specifications of SAM3S1B

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 64 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 23
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 34
• Ext Interrupts: 34
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 10
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1000
• Analog Comparators: 1
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

28.5.14
6500C–ATARM–8-Feb-11
6500C–ATARM–8-Feb-11
Write Protection Registers
To prevent any single software error that may corrupt PIO behavior, certain address spaces can
be write-protected by setting the WPEN bit in the
(PIO_WPMR).
If a write access to the protected registers is detected, then the WPVS flag in the PIO Write Pro-
tect Status Register (PIO_WPSR) is set and the field WPVSRC indicates in which register the
write access has been attempted.
The WPVS flag is reset by writing the PIO Write Protect Mode Register (PIO_WPMR) with the
appropriate access key, WPKEY.
The protected registers are:
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
“PIO Enable Register” on page 502
“PIO Disable Register” on page 502
“PIO Output Enable Register” on page 503
“PIO Output Disable Register” on page 504
“PIO Input Filter Enable Register” on page 505
“PIO Input Filter Disable Register” on page 505
“PIO Multi-driver Enable Register” on page 510
“PIO Multi-driver Disable Register” on page 511
“PIO Pull Up Disable Register” on page 512
“PIO Pull Up Enable Register” on page 512
“PIO Peripheral ABCD Select Register 1” on page 514
“PIO Peripheral ABCD Select Register 2” on page 515
“PIO Output Write Enable Register” on page 520
“PIO Output Write Disable Register” on page 520
“PIO Pad Pull Down Disable Register” on page 518
“PIO Pad Pull Down Status Register” on page 519
“PIO Parallel Capture Mode Register” on page 530
“PIO Write Protect Mode Register”
SAM3S
SAM3S
497
497