SAM3S1B Atmel Corporation, SAM3S1B Datasheet - Page 768

• Manufacturer Part Number: SAM3S1B
• Manufacturer: Atmel Corporation

Specifications of SAM3S1B

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 64 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 23
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 34
• Ext Interrupts: 34
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 10
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1000
• Analog Comparators: 1
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

34.7
Table 34-5.
Notes:
768
0x00 + channel * 0x40 + 0x0C
0x00 + channel * 0x40 + 0x1C
0x00 + channel * 0x40 + 0x2C
0x00 + channel * 0x40 + 0x00
0x00 + channel * 0x40 + 0x04
0x00 + channel * 0x40 + 0x08
0x00 + channel * 0x40 + 0x10
0x00 + channel * 0x40 + 0x14
0x00 + channel * 0x40 + 0x18
0x00 + channel * 0x40 + 0x20
0x00 + channel * 0x40 + 0x24
0x00 + channel * 0x40 + 0x28
Timer Counter (TC) User Interface
1. Channel index ranges from 0 to 2.
2. Read-only if WAVE = 0
SAM3S
Offset
Register Mapping
0xCC
0xC0
0xC4
0xC8
0xD0
0xD4
0xD8
0xE4
0xFC
(1)
Register
Channel Control Register
Channel Mode Register
Stepper Motor Mode Register
Reserved
Counter Value
Register A
Register B
Register C
Status Register
Interrupt Enable Register
Interrupt Disable Register
Interrupt Mask Register
Block Control Register
Block Mode Register
QDEC Interrupt Enable Register
QDEC Interrupt Disable Register
QDEC Interrupt Mask Register
QDEC Interrupt Status Register
Fault Mode Register
Reserved
Write Protect Mode Register
TC_WPMR
TC_SMMR
TC_QIMR
TC_QIER
TC_QIDR
TC_QISR
TC_CCR
TC_CMR
TC_BMR
TC_FMR
TC_BCR
TC_IMR
TC_IER
TC_IDR
TC_CV
TC_RA
TC_RB
TC_RC
TC_SR
Name
–
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Write-only
Read-only
Read-only
Write-only
Write-only
Read-only
Write-only
Write-only
Read-only
Read-only
Write-only
Access
–
(2)
(2)
6500C–ATARM–8-Feb-11
Reset
–
0
0
0
0
0
0
0
–
–
0
–
0
–
–
0
0
0
0
–