SAM3S1B Atmel Corporation, SAM3S1B Datasheet - Page 879

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SAM3S1B

Manufacturer Part Number
SAM3S1B
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3S1B

Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
64 MHz
Cpu
Cortex-M3
# Of Touch Channels
23
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
10
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Table 36-7.
Notes:
6500C–ATARM–8-Feb-11
Offset
0x200 + ch_num *
0x20 + 0x00
0x200 + ch_num *
0x20 + 0x04
0x200 + ch_num *
0x20 + 0x08
0x200 + ch_num *
0x20 + 0x0C
0x200 + ch_num *
0x20 + 0x10
0x200 + ch_num *
0x20 + 0x14
0x200 + ch_num *
0x20 + 0x18
0x200 + ch_num *
0x20 + 0x1C
1. Some registers are indexed with “ch_num” index ranging from 0 to 3.
Register Mapping (Continued)
Register
PWM Channel Mode Register
PWM Channel Duty Cycle Register
PWM Channel Duty Cycle Update Register
PWM Channel Period Register
PWM Channel Period Update Register
PWM Channel Counter Register
PWM Channel Dead Time Register
PWM Channel Dead Time Update Register
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Name
PWM_CMR
PWM_CDTY
PWM_CDTYUPD
PWM_CPRD
PWM_CPRDUPD
PWM_CCNT
PWM_DT
PWM_DTUPD
Read-write
Read-write
Read-write
Read-write
Read-only
Write-only
Write-only
Write-only
Access
SAM3S
Reset
0x0
0x0
0x0
0x0
0x0
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