SAM3S1B Atmel Corporation, SAM3S1B Datasheet - Page 955

• Manufacturer Part Number: SAM3S1B
• Manufacturer: Atmel Corporation

Specifications of SAM3S1B

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 64 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 23
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 34
• Ext Interrupts: 34
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 10
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1000
• Analog Comparators: 1
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

37.7.10
Name:
Address:
Access:
WARNING: Due to synchronization between MCK and UDPCK, the software application must wait for the end of the write
operation before executing another write by polling the bits which must be set/cleared.
6500C–ATARM–8-Feb-11
#if defined ( __ICCARM__ )
#elif defined
#endif
/// Bitmap for all status bits in CSR that are not effected by a value 1.
#define REG_NO_EFFECT_1_ALL
/// Sets the specified bit(s) in the UDP_CSR register.
/// \param endpoint The endpoint number of the CSR to process.
/// \param flags The bitmap to set to 1.
#define SET_CSR(endpoint, flags) \
for( nop_count=0; nop_count<15; nop_count++ ) {\
EPEDS
DIR
31
23
15
#define nop() (__no_operation())
#define nop()
–
7
{ \
UDP Endpoint Control and Status Register
volatile unsigned int reg; \
reg = AT91C_BASE_UDP->UDP_CSR[endpoint] ; \
reg |= REG_NO_EFFECT_1_ALL; \
reg |= (flags); \
AT91C_BASE_UDP->UDP_CSR[endpoint] = reg; \
}\
RX_DATA_
BK1
30
22
14
UDP_CSRx [x = 0..7]
0x40034030
Read-write
–
–
6
(
nop();\
__asm__ __volatile__ ( "nop" )
__GNUC__
FORCE
STALL
29
21
13
–
–
5
| AT91C_UDP_RX_DATA_BK1\
| AT91C_UDP_STALLSENT\
| AT91C_UDP_RXSETUP\
| AT91C_UDP_TXCOMP
)
AT91C_UDP_RX_DATA_BK0\
TXPKTRDY
28
20
12
–
–
4
RXBYTECNT
STALLSENT
ISOERROR
DTGLE
27
19
11
–
3
RXSETUP
26
18
10
2
RXBYTECNT
RX_DATA_
EPTYPE
BK0
25
17
9
1
SAM3S
TXCOMP
24
16
8
0
955