SAM3S4B Atmel Corporation, SAM3S4B Datasheet - Page 102

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SAM3S4B

Manufacturer Part Number
SAM3S4B
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3S4B

Flash (kbytes)
256 Kbytes
Pin Count
64
Max. Operating Frequency
64 MHz
Cpu
Cortex-M3
# Of Touch Channels
23
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
10
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
48
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
10.12.9
10.12.9.1
10.12.9.2
10.12.9.3
10.12.9.4
102
CLREX
SAM3S
CLREX
Syntax
Operation
Condition flags
Examples
Clear Exclusive.
where:
cond
Use CLREX to make the next STREX, STREXB, or STREXH instruction write 1 to its destination
register and fail to perform the store. It is useful in exception handler code to force the failure of
the store exclusive if the exception occurs between a load exclusive instruction and the match-
ing store exclusive instruction in a synchronization operation.
See
These instructions do not change the flags.
CLREX{cond}
“Synchronization primitives” on page 61
is an optional condition code, see
for more information.
“Conditional execution” on page
6500C–ATARM–8-Feb-11
84.

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