SAM3S4B Atmel Corporation, SAM3S4B Datasheet - Page 1020

• Manufacturer Part Number: SAM3S4B
• Manufacturer: Atmel Corporation

Specifications of SAM3S4B

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 64 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 23
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 79
• Ext Interrupts: 79
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 10
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1000
• Analog Comparators: 1
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 48
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

40.6.8
Write Protection Registers
In order to provide security to the DACC, a write protection system has been implemented.
The write protection mode prevents the writing of certain registers. When this mode is enabled and one of
the protected registers is written, an error is generated in the
DACC Write Protect Status Register
and the
register write request is canceled. When a write protection error occurs, the WPROTERR flag is set and the
address of the corresponding canceled register write is available in the WPROTADRR field of the
DACC
Write Protect Status
Register.
Due to the nature of the write protection feature, enabling and disabling the write protection mode requires
the use of a security code. Thus when enabling or disabling the write protection mode the WPKEY field of
the
DACC Write Protect Mode Register
must be filled with the “DAC” ASCII code (corresponding to
0x444143) otherwise the register write is canceled.
The protected registers are:
DACC Mode Register
DACC Channel Enable Register
DACC Channel Disable Register
DACC Analog Current Register
SAM3S
1020
6500C–ATARM–8-Feb-11