SAM3S4B Atmel Corporation, SAM3S4B Datasheet - Page 1076

• Manufacturer Part Number: SAM3S4B
• Manufacturer: Atmel Corporation

Specifications of SAM3S4B

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 64 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 23
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 79
• Ext Interrupts: 79
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 10
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1000
• Analog Comparators: 1
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 48
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

41.11.6
41.11.6.1
Table 41-47. SMC Read Signals - NRD Controlled (READ_MODE = 1)
1076
Symbol
SMC
SMC
SMC
SMC
SMC
SMC
SMC
1
2
3
4
5
6
7
SAM3S
SMC Timings
Parameter
Data Setup before NRD High
Data Hold after NRD High
Data Setup before NRD High
Data Hold after NRD High
NCS low before NRD High
NRD Pulse Width
Read Timings
A0 - A22 Valid before NRD High
VDDIO Supply
Figure 41-25. Min and Max Access Time of Output Signals
SMC Timings are given with the following conditions.
VDDIO = 1.62V @ 30 pF
VDDIO = 3V @ 50 pF
Timings are given assuming a capacitance load on data, control and address pads:
In the following tables t
HOLD or NO HOLD SETTINGS (nrd hold ≠ 0, nrd hold = 0)
NO HOLD SETTINGS (nrd hold = 0)
TK (CKI =0)
TK (CKI =1)
HOLD SETTINGS (nrd hold ≠ 0)
nrd pulse - ncs
t
(nrd setup +
CPMCK
(nrd setup +
t
TF/TD
CPMCK
t
nrd pulse)*
nrd pulse *
rd setup) *
CPMCK
CPMCK
1.8V
31.3
25
0
0
+ 13.5
- 6.7
is MCK period. Timing extraction
+ 14
(2)
Min
nrd pulse - ncs
t
(nrd setup +
(nrd setup +
CPMCK
t
t
nrd pulse)*
nrd pulse *
rd setup) *
CPMCK
CPMCK
3.3V
28.5
20.4
SSC
0
0
SSC
+ 14.5
- 3.6
(3)
+ 15
0max
0min
1.8V
(2)
Max
3.3V
6500C–ATARM–8-Feb-11
(3)
Units
ns
ns
ns
ns
ns
ns
ns