SAM3S4B Atmel Corporation, SAM3S4B Datasheet - Page 113

• Manufacturer Part Number: SAM3S4B
• Manufacturer: Atmel Corporation

Specifications of SAM3S4B

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 64 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 23
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 79
• Ext Interrupts: 79
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 10
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1000
• Analog Comparators: 1
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 48
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

10.13.5
10.13.5.1
10.13.5.2
10.13.5.3
10.13.5.4
10.13.5.5
6500C–ATARM–8-Feb-11
CMP
CMN
CMPGT
CMP and CMN
Syntax
Operation
Restrictions
Condition flags
Examples
R2, R9
R0, #6400
SP, R7, LSL #2
Compare and Compare Negative.
where:
cond
Rn
Operand2
details of the options.
These instructions compare the value in a register with Operand2. They update the condition
flags on the result, but do not write the result to a register.
The CMP instruction subtracts the value of Operand2 from the value in Rn. This is the same as
a SUBS instruction, except that the result is discarded.
The CMN instruction adds the value of Operand2 to the value in Rn. This is the same as an
ADDS instruction, except that the result is discarded.
In these instructions:
These instructions update the N, Z, C and V flags according to the result.
• do not use PC
• Operand2 must not be SP.
CMP{cond} Rn, Operand2
CMN{cond} Rn, Operand2
is an optional condition code, see
is the register holding the first operand.
is a flexible second operand. See
“Conditional execution” on page
“Flexible second operand” on page 80
84.
SAM3S
113
for