SAM3S4B Atmel Corporation, SAM3S4B Datasheet - Page 122

• Manufacturer Part Number: SAM3S4B
• Manufacturer: Atmel Corporation

Specifications of SAM3S4B

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 64 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 23
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 79
• Ext Interrupts: 79
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 10
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1000
• Analog Comparators: 1
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 48
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

10.14.3
10.14.3.1
10.14.3.2
10.14.3.3
10.14.3.4
10.14.3.5
122
SDIV
UDIV
SAM3S
SDIV and UDIV
Syntax
Operation
Restrictions
Condition flags
Examples
R0, R2, R4
R8, R8, R1
Signed Divide and Unsigned Divide.
where:
cond
Rd
Rn
Rm
SDIV performs a signed integer division of the value in Rn by the value in Rm.
UDIV performs an unsigned integer division of the value in Rn by the value in Rm.
For both instructions, if the value in Rn is not divisible by the value in Rm, the result is rounded
towards zero.
Do not use SP and do not use PC
These instructions do not change the flags.
SDIV{cond} {Rd,} Rn, Rm
UDIV{cond} {Rd,} Rn, Rm
; Signed divide, R0 = R2/R4
; Unsigned divide, R8 = R8/R1
is an optional condition code, see
is the destination register. If Rd is omitted, the destination register is Rn.
is the register holding the value to be divided.
is a register holding the divisor.
.
“Conditional execution” on page
6500C–ATARM–8-Feb-11
84.